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    Searched refs:mmUVD_JPEG_ADDR_CONFIG (Results 1 - 5 of 5) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/uvd/
uvd_5_0_d.h 115 #define mmUVD_JPEG_ADDR_CONFIG 0x3a1f
uvd_6_0_d.h 131 #define mmUVD_JPEG_ADDR_CONFIG 0x3a1f
uvd_7_0_offset.h 54 #define mmUVD_JPEG_ADDR_CONFIG 0x021f
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/vcn/
vcn_1_0_offset.h 112 #define mmUVD_JPEG_ADDR_CONFIG 0x021f
  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_vcn_v1_0.c 358 WREG32_SOC15(UVD, 0, mmUVD_JPEG_ADDR_CONFIG,
1057 WREG32_SOC15_DPG_MODE(UVD, 0, mmUVD_JPEG_ADDR_CONFIG, tmp, 0xFFFFFFFF, 1);

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