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    Searched refs:mmUVD_LMI_RBC_IB_VMID (Results 1 - 9 of 9) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/uvd/
uvd_5_0_d.h 76 #define mmUVD_LMI_RBC_IB_VMID 0x3da1
uvd_6_0_d.h 92 #define mmUVD_LMI_RBC_IB_VMID 0x3da1
uvd_7_0_offset.h 194 #define mmUVD_LMI_RBC_IB_VMID 0x05a1
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/vcn/
vcn_1_0_offset.h 382 #define mmUVD_LMI_RBC_IB_VMID 0x05a1
vcn_2_0_0_offset.h 676 #define mmUVD_LMI_RBC_IB_VMID 0x0261
vcn_2_5_offset.h 973 #define mmUVD_LMI_RBC_IB_VMID 0x04b1
  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_uvd_v6_0.c 1003 amdgpu_ring_write(ring, PACKET0(mmUVD_LMI_RBC_IB_VMID, 0));
amdgpu_uvd_v7_0.c 1306 PACKET0(SOC15_REG_OFFSET(UVD, ring->me, mmUVD_LMI_RBC_IB_VMID), 0));
amdgpu_vcn_v1_0.c 1509 PACKET0(SOC15_REG_OFFSET(UVD, 0, mmUVD_LMI_RBC_IB_VMID), 0));

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