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    Searched refs:mmUVD_MIF_CURR_ADDR_CONFIG (Results 1 - 5 of 5) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/uvd/
uvd_5_0_d.h 111 #define mmUVD_MIF_CURR_ADDR_CONFIG 0x3992
uvd_6_0_d.h 127 #define mmUVD_MIF_CURR_ADDR_CONFIG 0x3992
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/vcn/
vcn_1_0_offset.h 93 #define mmUVD_MIF_CURR_ADDR_CONFIG 0x0192
vcn_2_5_offset.h 841 #define mmUVD_MIF_CURR_ADDR_CONFIG 0x03ae
  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_vcn_v1_0.c 346 WREG32_SOC15(UVD, 0, mmUVD_MIF_CURR_ADDR_CONFIG,
422 WREG32_SOC15_DPG_MODE(UVD, 0, mmUVD_MIF_CURR_ADDR_CONFIG,

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