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    Searched refs:mmUVD_MIF_CURR_UV_ADDR_CONFIG (Results 1 - 3 of 3) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/vcn/
vcn_1_0_offset.h	87 #define mmUVD_MIF_CURR_UV_ADDR_CONFIG 0x0184
vcn_2_5_offset.h	835 #define mmUVD_MIF_CURR_UV_ADDR_CONFIG 0x03a0
/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_vcn_v1_0.c	348 WREG32_SOC15(UVD, 0, mmUVD_MIF_CURR_UV_ADDR_CONFIG, 424 WREG32_SOC15_DPG_MODE(UVD, 0, mmUVD_MIF_CURR_UV_ADDR_CONFIG,

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