HomeSort by: relevance | last modified time | path
    Searched refs:mmUVD_MPC_SET_MUXB1 (Results 1 - 12 of 12) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/uvd/
uvd_4_0_d.h 61 #define mmUVD_MPC_SET_MUXB1 0x3D7C
uvd_4_2_d.h 59 #define mmUVD_MPC_SET_MUXB1 0x3d7c
uvd_5_0_d.h 65 #define mmUVD_MPC_SET_MUXB1 0x3d7c
uvd_6_0_d.h 81 #define mmUVD_MPC_SET_MUXB1 0x3d7c
uvd_7_0_offset.h 172 #define mmUVD_MPC_SET_MUXB1 0x057c
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/vcn/
vcn_1_0_offset.h 354 #define mmUVD_MPC_SET_MUXB1 0x057c
vcn_2_0_0_offset.h 604 #define mmUVD_MPC_SET_MUXB1 0x023c
vcn_2_5_offset.h 769 #define mmUVD_MPC_SET_MUXB1 0x02d1
  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_uvd_v4_2.c 301 WREG32(mmUVD_MPC_SET_MUXB1, 0x0);
amdgpu_uvd_v5_0.c 348 WREG32(mmUVD_MPC_SET_MUXB1, 0x0);
amdgpu_uvd_v6_0.c 764 WREG32(mmUVD_MPC_SET_MUXB1, 0x0);
amdgpu_uvd_v7_0.c 1009 WREG32_SOC15(UVD, k, mmUVD_MPC_SET_MUXB1, 0x0);

Completed in 25 milliseconds