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Searched refs:mmUVD_RB_SIZE2 (Results 1 - 10 of 10) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/uvd/
uvd_6_0_d.h	`43 #define mmUVD_RB_SIZE2 0x3c23`
uvd_7_0_offset.h	`90 #define mmUVD_RB_SIZE2 0x0423`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/vcn/
vcn_1_0_offset.h	`212 #define mmUVD_RB_SIZE2 0x0423`
vcn_2_0_0_offset.h	`924 #define mmUVD_RB_SIZE2 0x05e3`
vcn_2_5_offset.h	`567 #define mmUVD_RB_SIZE2 0x00b1`
/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_vcn_v1_0.c	`952 WREG32_SOC15(UVD, 0, mmUVD_RB_SIZE2, ring->ring_size / 4); 1253 WREG32_SOC15(UVD, 0, mmUVD_RB_SIZE2, ring->ring_size / 4);`
amdgpu_vcn_v2_0.c	`1037 WREG32_SOC15(UVD, 0, mmUVD_RB_SIZE2, ring->ring_size / 4); 1179 WREG32_SOC15(UVD, 0, mmUVD_RB_SIZE2, ring->ring_size / 4);`
amdgpu_vcn_v2_5.c	`1068 WREG32_SOC15(UVD, i, mmUVD_RB_SIZE2, ring->ring_size / 4); 1409 WREG32_SOC15(UVD, inst_idx, mmUVD_RB_SIZE2, ring->ring_size / 4);`
amdgpu_uvd_v6_0.c	`858 WREG32(mmUVD_RB_SIZE2, ring->ring_size / 4);`
amdgpu_uvd_v7_0.c	`1112 WREG32_SOC15(UVD, k, mmUVD_RB_SIZE2, ring->ring_size / 4);`

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