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    Searched refs:mmUVD_REG_XX_MASK (Results 1 - 4 of 4) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_vcn.h 64 #define mmUVD_REG_XX_MASK 0x026c
amdgpu_vcn_v1_0.c 1028 WREG32_SOC15_DPG_MODE(UVD, 0, mmUVD_REG_XX_MASK, 0x10, 0xFFFFFFFF, 0);
amdgpu_vcn_v2_0.c 819 UVD, 0, mmUVD_REG_XX_MASK), 0x10, 0, indirect);
amdgpu_vcn_v2_5.c 827 UVD, 0, mmUVD_REG_XX_MASK), 0x10, 0, indirect);

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