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Searched refs:mmUVD_SCRATCH2 (Results 1 - 6 of 6) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/vcn/
vcn_1_0_offset.h	`48 #define mmUVD_SCRATCH2 0x00d6`
vcn_2_0_0_offset.h	`406 #define mmUVD_SCRATCH2 0x0016`
vcn_2_5_offset.h	`421 #define mmUVD_SCRATCH2 0x0016`
/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_vcn_v1_0.c	`931 WREG32_SOC15(UVD, 0, mmUVD_SCRATCH2, 0); 1089 WREG32_SOC15(UVD, 0, mmUVD_SCRATCH2, 0); 1259 RREG32_SOC15(UVD, 0, mmUVD_SCRATCH2) & 0x7FFFFFFF); 1320 RREG32_SOC15(UVD, 0, mmUVD_SCRATCH2) & 0x7FFFFFFF); 1412 WREG32_SOC15(UVD, 0, mmUVD_SCRATCH2,`
amdgpu_vcn_v2_0.c	`867 WREG32_SOC15(UVD, 0, mmUVD_SCRATCH2, 0); 1184 RREG32_SOC15(UVD, 0, mmUVD_SCRATCH2) & 0x7FFFFFFF); 1280 WREG32_SOC15(UVD, 0, mmUVD_SCRATCH2,`
amdgpu_vcn_v2_5.c	`880 WREG32_SOC15(UVD, inst_idx, mmUVD_SCRATCH2, 0); 1414 RREG32_SOC15(UVD, inst_idx, mmUVD_SCRATCH2) & 0x7FFFFFFF); 1473 WREG32_SOC15(UVD, ring->me, mmUVD_SCRATCH2,`

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