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Searched refs:mmVML2PF0_VM_L2_CNTL (Results 1 - 2 of 2) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_mmhub_v9_4.c	`218 tmp = RREG32_SOC15_OFFSET(MMHUB, 0, mmVML2PF0_VM_L2_CNTL, 233 WREG32_SOC15_OFFSET(MMHUB, 0, mmVML2PF0_VM_L2_CNTL, 428 tmp = RREG32_SOC15_OFFSET(MMHUB, 0, mmVML2PF0_VM_L2_CNTL, 432 WREG32_SOC15_OFFSET(MMHUB, 0, mmVML2PF0_VM_L2_CNTL,`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/mmhub/
mmhub_9_4_1_offset.h	`3900 #define mmVML2PF0_VM_L2_CNTL 0x09c0`

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