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    Searched refs:mmVM_L2_CNTL (Results 1 - 16 of 16) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_gfxhub_v1_0.c 150 tmp = RREG32_SOC15(GC, 0, mmVM_L2_CNTL);
159 WREG32_SOC15_RLC(GC, 0, mmVM_L2_CNTL, tmp);
amdgpu_mmhub_v1_0.c 170 tmp = RREG32_SOC15(MMHUB, 0, mmVM_L2_CNTL);
179 WREG32_SOC15(MMHUB, 0, mmVM_L2_CNTL, tmp);
359 tmp = RREG32_SOC15(MMHUB, 0, mmVM_L2_CNTL);
361 WREG32_SOC15(MMHUB, 0, mmVM_L2_CNTL, tmp);
amdgpu_gmc_v7_0.c 647 tmp = RREG32(mmVM_L2_CNTL);
655 WREG32(mmVM_L2_CNTL, tmp);
766 tmp = RREG32(mmVM_L2_CNTL);
768 WREG32(mmVM_L2_CNTL, tmp);
amdgpu_gmc_v8_0.c 868 tmp = RREG32(mmVM_L2_CNTL);
876 WREG32(mmVM_L2_CNTL, tmp);
1004 tmp = RREG32(mmVM_L2_CNTL);
1006 WREG32(mmVM_L2_CNTL, tmp);
amdgpu_gmc_v6_0.c 513 WREG32(mmVM_L2_CNTL,
621 WREG32(mmVM_L2_CNTL,
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gmc/
gmc_7_0_d.h 543 #define mmVM_L2_CNTL 0x500
gmc_8_2_d.h 601 #define mmVM_L2_CNTL 0x500
gmc_6_0_d.h 1259 #define mmVM_L2_CNTL 0x0500
gmc_7_1_d.h 576 #define mmVM_L2_CNTL 0x500
gmc_8_1_d.h 599 #define mmVM_L2_CNTL 0x500
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/mmhub/
mmhub_1_0_offset.h 1266 #define mmVM_L2_CNTL 0x0680
mmhub_9_1_offset.h 1298 #define mmVM_L2_CNTL 0x0680
mmhub_9_3_0_offset.h 1282 #define mmVM_L2_CNTL 0x0680
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_9_0_offset.h 1162 #define mmVM_L2_CNTL 0x0840
gc_9_1_offset.h 1188 #define mmVM_L2_CNTL 0x0840
gc_9_2_1_offset.h 1126 #define mmVM_L2_CNTL 0x0840

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