| /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/smumgr/ |
| amdgpu_fiji_smumgr.c | 2373 uint32_t mm_boot_level_offset, mm_boot_level_value; local in function:fiji_update_uvd_smc_table
2385 mm_boot_level_value = cgs_read_ind_register(hwmgr->device,
2387 mm_boot_level_value &= 0x00FFFFFF;
2388 mm_boot_level_value |= smu_data->smc_state_table.UvdBootLevel << 24;
2390 CGS_IND_REG__SMC, mm_boot_level_offset, mm_boot_level_value);
2405 uint32_t mm_boot_level_offset, mm_boot_level_value; local in function:fiji_update_vce_smc_table
2420 mm_boot_level_value = cgs_read_ind_register(hwmgr->device,
2422 mm_boot_level_value &= 0xFF00FFFF;
2423 mm_boot_level_value |= smu_data->smc_state_table.VceBootLevel << 16;
2425 CGS_IND_REG__SMC, mm_boot_level_offset, mm_boot_level_value);
[all...] |
| amdgpu_vegam_smumgr.c | 339 uint32_t mm_boot_level_offset, mm_boot_level_value; local in function:vegam_update_uvd_smc_table
351 mm_boot_level_value = cgs_read_ind_register(hwmgr->device,
353 mm_boot_level_value &= 0x00FFFFFF;
354 mm_boot_level_value |= smu_data->smc_state_table.UvdBootLevel << 24;
356 CGS_IND_REG__SMC, mm_boot_level_offset, mm_boot_level_value);
371 uint32_t mm_boot_level_offset, mm_boot_level_value; local in function:vegam_update_vce_smc_table
386 mm_boot_level_value = cgs_read_ind_register(hwmgr->device,
388 mm_boot_level_value &= 0xFF00FFFF;
389 mm_boot_level_value |= smu_data->smc_state_table.VceBootLevel << 16;
391 CGS_IND_REG__SMC, mm_boot_level_offset, mm_boot_level_value);
[all...] |
| amdgpu_polaris10_smumgr.c | 2185 uint32_t mm_boot_level_offset, mm_boot_level_value; local in function:polaris10_update_uvd_smc_table
2197 mm_boot_level_value = cgs_read_ind_register(hwmgr->device,
2199 mm_boot_level_value &= 0x00FFFFFF;
2200 mm_boot_level_value |= smu_data->smc_state_table.UvdBootLevel << 24;
2202 CGS_IND_REG__SMC, mm_boot_level_offset, mm_boot_level_value);
2217 uint32_t mm_boot_level_offset, mm_boot_level_value; local in function:polaris10_update_vce_smc_table
2232 mm_boot_level_value = cgs_read_ind_register(hwmgr->device,
2234 mm_boot_level_value &= 0xFF00FFFF;
2235 mm_boot_level_value |= smu_data->smc_state_table.VceBootLevel << 16;
2237 CGS_IND_REG__SMC, mm_boot_level_offset, mm_boot_level_value);
[all...] |
| amdgpu_tonga_smumgr.c | 2684 uint32_t mm_boot_level_offset, mm_boot_level_value; local in function:tonga_update_uvd_smc_table
2696 mm_boot_level_value = cgs_read_ind_register(hwmgr->device,
2698 mm_boot_level_value &= 0x00FFFFFF;
2699 mm_boot_level_value |= smu_data->smc_state_table.UvdBootLevel << 24;
2702 mm_boot_level_offset, mm_boot_level_value);
2718 uint32_t mm_boot_level_offset, mm_boot_level_value; local in function:tonga_update_vce_smc_table
2730 mm_boot_level_value = cgs_read_ind_register(hwmgr->device,
2732 mm_boot_level_value &= 0xFF00FFFF;
2733 mm_boot_level_value |= smu_data->smc_state_table.VceBootLevel << 16;
2735 CGS_IND_REG__SMC, mm_boot_level_offset, mm_boot_level_value);
[all...] |
