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    Searched refs:nkmp (Results 1 - 4 of 4) sorted by relevancy

  /src/sys/arch/arm/sunxi/
sunxi_ccu_nkmp.c 43 struct sunxi_ccu_nkmp *nkmp = &clk->u.nkmp; local
48 if (!nkmp->enable)
51 val = CCU_READ(sc, nkmp->reg);
53 val |= nkmp->enable;
55 val &= ~nkmp->enable;
56 CCU_WRITE(sc, nkmp->reg, val);
65 struct sunxi_ccu_nkmp *nkmp = &clk->u.nkmp; local
82 val = CCU_READ(sc, nkmp->reg)
141 struct sunxi_ccu_nkmp *nkmp = &clk->u.nkmp; local
237 struct sunxi_ccu_nkmp *nkmp = &clk->u.nkmp; local
    [all...]
sun9i_a80_ccu.c 140 const int cluster = clk->u.nkmp.reg == PLL_C0CPUX_CTRL_REG ? 0 : 1;
141 struct sunxi_ccu_nkmp *nkmp = &clk->u.nkmp; local
157 val = CCU_READ(sc, nkmp->reg);
158 val &= ~nkmp->n;
159 val |= __SHIFTIN(n, nkmp->n);
160 CCU_WRITE(sc, nkmp->reg, val);
163 while ((CCU_READ(sc, PLL_STABLE_STATUS_REG) & nkmp->lock) == 0)
180 .u.nkmp.reg = PLL_C0CPUX_CTRL_REG,
181 .u.nkmp.parent = "hosc"
    [all...]
sun8i_a83t_ccu.c 138 const int cluster = clk->u.nkmp.reg == PLL_C0CPUX_CTRL_REG ? 0 : 1;
139 struct sunxi_ccu_nkmp *nkmp = &clk->u.nkmp; local
155 val = CCU_READ(sc, nkmp->reg);
158 CCU_WRITE(sc, nkmp->reg, val);
161 while ((CCU_READ(sc, PLL_STABLE_STATUS_REG) & nkmp->lock) == 0)
178 .u.nkmp.reg = PLL_C0CPUX_CTRL_REG,
179 .u.nkmp.parent = "hosc",
180 .u.nkmp.n = __BITS(15,8),
181 .u.nkmp.k = 0
    [all...]
sunxi_ccu.h 142 .u.nkmp.reg = (_reg), \
143 .u.nkmp.parent = (_parent), \
144 .u.nkmp.n = (_n), \
145 .u.nkmp.k = (_k), \
146 .u.nkmp.m = (_m), \
147 .u.nkmp.p = (_p), \
148 .u.nkmp.enable = (_enable), \
149 .u.nkmp.flags = (_flags), \
150 .u.nkmp.lock = (_lock), \
151 .u.nkmp.sdm_en = (_sdm_en),
466 struct sunxi_ccu_nkmp nkmp; member in union:sunxi_ccu_clk::__anon1
    [all...]

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