/src/sys/external/isc/atheros_hal/dist/ar5312/ |
ar5312.h | 61 extern void ar5312SetupClock(struct ath_hal *ah, HAL_OPMODE opmode); 62 extern void ar5312RestoreClock(struct ath_hal *ah, HAL_OPMODE opmode); 64 extern HAL_BOOL ar5312Reset(struct ath_hal *ah, HAL_OPMODE opmode,
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ar5312_misc.c | 98 ar5312SetupClock(struct ath_hal *ah, HAL_OPMODE opmode) 100 if (ar5212Use32KHzclock(ah, opmode)) { 142 ar5312RestoreClock(struct ath_hal *ah, HAL_OPMODE opmode) 144 if (ar5212Use32KHzclock(ah, opmode)) {
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ar5312_reset.c | 83 ar5312Reset(struct ath_hal *ah, HAL_OPMODE opmode, 129 switch (opmode) { 137 __func__, opmode); 206 ar5312RestoreClock(ah, opmode); /* move to refclk operation */ 377 ar5212SetOperatingMode(ah, opmode); 522 if (opmode == HAL_M_HOSTAP) 543 ar5312SetupClock(ah, opmode); 584 AH_PRIVATE(ah)->ah_opmode = opmode; /* record operating mode */
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/src/sys/dev/ic/ |
rtwphy.c | 227 uint32_t opmode; local in function:rtw_sa2400_pwrstate 228 opmode = SA2400_OPMODE_DEFAULTS; 231 opmode |= SA2400_OPMODE_MODE_TXRX; 234 opmode |= SA2400_OPMODE_MODE_WAIT; 237 opmode |= SA2400_OPMODE_MODE_SLEEP; 242 opmode |= SA2400_OPMODE_DIGIN; 245 opmode); 267 uint32_t opmode; local in function:rtw_sa2400_vcocal_start 269 opmode = SA2400_OPMODE_DEFAULTS; 271 opmode |= SA2400_OPMODE_MODE_VCOCALIB 297 uint32_t opmode; local in function:rtw_sa2400_filter_calibration [all...] |
dwc_gmac.c | 912 uint32_t opmode = GMAC_DMA_OP_RXSTART | GMAC_DMA_OP_TXSTART; local in function:dwc_gmac_init 914 opmode |= GMAC_DMA_OP_RXSTOREFORWARD | GMAC_DMA_OP_TXSTOREFORWARD; 916 bus_space_write_4(sc->sc_bst, sc->sc_bsh, AWIN_GMAC_DMA_OPMODE, opmode); 919 "setting DMA opmode register: %08x\n", opmode);
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tulip.c | 1604 * Initialize `opmode' to 0, and call the pre-init routine, if 1606 * clones require that the media-related bits in `opmode' be 1737 * Initialize the OPMODE register. We don't write it until 1740 * Media-related OPMODE bits are set in the media callbacks 2586 * writing OPMODE will start the transmit and receive processes 2719 * multicast in OPMODE below. 2791 * Set the OPMODE register. This will also resume the 3256 * Write new OPMODE bits. This also restarts the transmit 3266 * for the Winbond 89C840F, which has different OPMODE bits. 3285 * Write new OPMODE bits. This also restarts the transmi 6059 uint32_t opmode; local in function:tlp_dm9102_tmsw_init 6143 uint32_t opmode; local in function:tlp_asix_tmsw_init [all...] |
atw.c | 2033 DPRINTF(sc, ("%s: ATW_NAR %08x opmode %08x\n", device_xname(sc->sc_dev), 2992 uint32_t ackmask = 0, opmode, stsr, test0; local in function:atw_idle 2997 opmode = sc->sc_opmode & ~bits; 3005 opmode |= ATW_NAR_HF; 3008 ATW_WRITE(sc, ATW_NAR, opmode);
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rtw.c | 2641 rtw_set_nettype(struct rtw_softc *sc, enum ieee80211_opmode opmode) 2650 switch (opmode) {
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/src/sys/external/isc/atheros_hal/dist/ar5210/ |
ar5210_reset.c | 59 static void ar5210SetOperatingMode(struct ath_hal *, int opmode); 70 ar5210Reset(struct ath_hal *ah, HAL_OPMODE opmode, 83 "%s: opmode %u channel %u/0x%x %s channel\n", __func__, 84 opmode, chan->channel, chan->channelFlags, 102 switch (opmode) { 110 __func__, opmode); 126 ar5210SetOperatingMode(ah, opmode); 128 switch (opmode) { 293 AH_PRIVATE(ah)->ah_opmode = opmode; /* record operating mode */ 307 ar5210SetOperatingMode(struct ath_hal *ah, int opmode) [all...] |
/src/sys/external/isc/atheros_hal/dist/ar5211/ |
ar5211_reset.c | 138 static void ar5211SetOperatingMode(struct ath_hal *, int opmode); 149 ar5211Reset(struct ath_hal *ah, HAL_OPMODE opmode, 169 "%s: opmode %u channel %u/0x%x %s channel\n", 170 __func__, opmode, chan->channel, chan->channelFlags, 198 switch (opmode) { 206 "%s: invalid operating mode %u\n", __func__, opmode); 389 ar5211SetOperatingMode(ah, opmode); 429 if (opmode != HAL_M_HOSTAP && 520 if (opmode == HAL_M_HOSTAP) { 549 AH_PRIVATE(ah)->ah_opmode = opmode; /* record operating mode * [all...] |
/src/sys/external/isc/atheros_hal/dist/ar5212/ |
ar5212_misc.c | 645 ar5212Use32KHzclock(struct ath_hal *ah, HAL_OPMODE opmode) 647 if (opmode != HAL_M_HOSTAP) { 663 ar5212SetupClock(struct ath_hal *ah, HAL_OPMODE opmode) 665 if (ar5212Use32KHzclock(ah, opmode)) { 720 ar5212RestoreClock(struct ath_hal *ah, HAL_OPMODE opmode) 722 if (ar5212Use32KHzclock(ah, opmode)) {
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ar5212_ani.c | 620 HAL_OPMODE opmode, int restore) 631 ath_hal_printf(ah,"%s: chan %u/0x%x restore %d setup %d opmode %u\n", 633 aniState->isSetup, opmode); 636 "%s: chan %u/0x%x restore %d setup %d opmode %u\n", 638 aniState->isSetup, opmode); 640 OS_MARK(ah, AH_MARK_ANI_RESET, opmode); 650 if (opmode == HAL_M_STA)
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ar5212.h | 493 extern HAL_BOOL ar5212Use32KHzclock(struct ath_hal *ah, HAL_OPMODE opmode); 494 extern void ar5212SetupClock(struct ath_hal *ah, HAL_OPMODE opmode); 495 extern void ar5212RestoreClock(struct ath_hal *ah, HAL_OPMODE opmode); 530 extern HAL_BOOL ar5212Reset(struct ath_hal *ah, HAL_OPMODE opmode, 533 extern void ar5212SetOperatingMode(struct ath_hal *ah, int opmode);
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ar5212_reset.c | 99 ar5212Reset(struct ath_hal *ah, HAL_OPMODE opmode, 157 switch (opmode) { 165 __func__, opmode); 214 * XXX opmode shouldn't change either? 247 ar5212RestoreClock(ah, opmode); /* move to refclk operation */ 417 ar5212SetOperatingMode(ah, opmode); 559 if (opmode == HAL_M_HOSTAP) 580 ar5212SetupClock(ah, opmode); 669 AH_PRIVATE(ah)->ah_opmode = opmode; /* record operating mode */ 804 ar5212SetOperatingMode(struct ath_hal *ah, int opmode) [all...] |
/src/sys/dev/marvell/ |
gtidmac.c | 1967 uint32_t val, opmode; local in function:gtidmac_dump_xorereg 1978 opmode = val & MVXORE_XEXCR_OM_MASK; 1980 opmode == MVXORE_XEXCR_OM_XOR ? "XOR calculate" : 1981 opmode == MVXORE_XEXCR_OM_CRC32 ? "CRC-32 calculate" : 1982 opmode == MVXORE_XEXCR_OM_DMA ? "DMA" : 1983 opmode == MVXORE_XEXCR_OM_ECC ? "ECC cleanup" : 1984 opmode == MVXORE_XEXCR_OM_MEMINIT ? "Memory Initialization" : 2005 if (opmode == MVXORE_XEXCR_OM_XOR || 2006 opmode == MVXORE_XEXCR_OM_CRC32 || 2007 opmode == MVXORE_XEXCR_OM_DMA) [all...] |
/src/sys/external/isc/atheros_hal/dist/ar5416/ |
ar5416_ani.c | 540 HAL_OPMODE opmode, int restore) 551 ath_hal_printf(ah,"%s: chan %u/0x%x restore %d setup %d opmode %u\n", 553 aniState->isSetup, opmode); 556 "%s: chan %u/0x%x restore %d setup %d opmode %u\n", 558 aniState->isSetup, opmode); 560 OS_MARK(ah, AH_MARK_ANI_RESET, opmode); 570 if (opmode == HAL_M_STA)
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ar5416_reset.c | 44 static void ar5416InitIMR(struct ath_hal *ah, HAL_OPMODE opmode); 96 ar5416Reset(struct ath_hal *ah, HAL_OPMODE opmode, 148 switch (opmode) { 156 __func__, opmode); 283 ar5212SetOperatingMode(ah, opmode); 316 ar5416InitIMR(ah, opmode); 360 AH_PRIVATE(ah)->ah_opmode = opmode; /* record operating mode */ 564 ar5416InitIMR(struct ath_hal *ah, HAL_OPMODE opmode) 584 if (opmode == HAL_M_HOSTAP)
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ar5416.h | 176 extern HAL_BOOL ar5416Reset(struct ath_hal *ah, HAL_OPMODE opmode,
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/src/sys/arch/mips/atheros/dev/ |
if_ae.c | 134 uint32_t txth_opmode; /* OPMODE bits */ 911 uint32_t opmode; local in function:ae_intr 913 opmode = AE_READ(sc, CSR_OPMODE); 917 opmode &= ~(OPMODE_TR | OPMODE_SF); 918 opmode |= 929 AE_WRITE(sc, CSR_OPMODE, opmode); 1416 * Write out the opmode. 1827 //opmode = AE_READ(sc, CSR_OPMODE); 1848 //AE_WRITE(sc, CSR_OPMODE, opmode);
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/src/sys/arch/m68k/m68k/ |
db_disasm.c | 791 int opmode; local in function:opcode_0101 793 opmode = BITFIELD(opc,2,0); 796 if (opmode == 0x2) { 800 } else if (opmode == 0x3) { 1366 int type, opmode; local in function:opcode_fpu 1374 opmode = BITFIELD(ext,5,0); 1386 switch(opmode) {
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/src/sys/dev/usb/ |
if_athn_usb.h | 183 uint32_t opmode; member in struct:ar_htc_target_vif
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if_athn_usb.c | 2830 hvif.opmode = htobe32(AR_HTC_M_STA); 2833 hvif.opmode = htobe32(AR_HTC_M_MONITOR); 2837 hvif.opmode = htobe32(AR_HTC_M_IBSS); 2840 hvif.opmode = htobe32(AR_HTC_M_AHDEMO); 2843 hvif.opmode = htobe32(AR_HTC_M_HOSTAP);
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/src/sbin/ifconfig/ |
ieee80211.c | 604 enum ieee80211_opmode opmode = get80211opmode(env); local in function:ieee80211_status 619 if (opmode == IEEE80211_M_HOSTAP) {
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/src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/ |
stm32mp15xx-dkx.dtsi | 263 typec-power-opmode = "default";
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