| /src/sys/dev/pci/ |
| puccn.c | 107 pci_decompose_tag(pa.pa_pc, pa.pa_tag, &bus, &maxdev, NULL);
111 pa.pa_tag = pci_make_tag(pa.pa_pc, bus, dev, 0);
112 reg = pci_conf_read(pa.pa_pc, pa.pa_tag, PCI_ID_REG);
116 bhlcr = pci_conf_read(pa.pa_pc, pa.pa_tag, PCI_BHLC_REG);
124 pa.pa_tag = pci_make_tag(pa.pa_pc, bus, dev, func);
125 reg = pci_conf_read(pa.pa_pc, pa.pa_tag,
130 pa.pa_id = pci_conf_read(pa.pa_pc, pa.pa_tag,
132 subsys = pci_conf_read(pa.pa_pc, pa.pa_tag,
173 base = pci_conf_read(pa.pa_pc, pa.pa_tag, desc->ports[i].bar);
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| mpt_pci.c | 142 psc->sc_tag = pa->pa_tag;
150 memtype = pci_mapreg_type(pa->pa_pc, pa->pa_tag, MPT_PCI_MMBA);
173 reg = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
178 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, reg);
187 reg = pci_conf_read(pa->pa_pc, pa->pa_tag, 0x68);
189 pci_conf_write(pa->pa_pc, pa->pa_tag, 0x68, reg);
195 reg = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_MAPREG_ROM);
197 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_MAPREG_ROM, reg);
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| iop_pci.c | 99 reg = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBSYS_ID_REG);
130 reg = pci_conf_read(pc, pa->pa_tag, i);
159 reg = pci_conf_read(pc, pa->pa_tag, PCI_SUBSYS_ID_REG);
181 reg = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
182 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
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| adv_pci.c | 157 command = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
162 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
172 bhlcr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_BHLC_REG);
177 pci_conf_write(pa->pa_pc, pa->pa_tag,
183 pci_conf_write(pa->pa_pc, pa->pa_tag,
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| if_ex_pci.c | 232 rev = PCI_REVISION(pci_conf_read(pc, pa->pa_tag, PCI_CLASS_REG));
240 pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
241 pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) |
245 psc->psc_tag = pa->pa_tag;
247 pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
249 pci_conf_read(pc, pa->pa_tag, PCI_BHLC_REG);
251 pci_conf_read(pc, pa->pa_tag, PCI_CBIO);
264 pci_conf_read(pc, pa->pa_tag, PCI_FUNCMEM);
268 pci_conf_read(pc, pa->pa_tag, PCI_INTERRUPT_REG);
270 error = pci_activate(pa->pa_pc, pa->pa_tag, self, ex_d3tod0)
[all...] |
| if_fxp_pci.c | 363 pci_mapreg_info(pa->pa_pc, pa->pa_tag, FXP_PCI_MMBA,
378 csr = pci_conf_read(pa->pa_pc, pa->pa_tag,
381 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
482 pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
483 pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) |
496 psc->psc_tag = pa->pa_tag;
498 pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
500 pci_conf_read(pc, pa->pa_tag, PCI_BHLC_REG);
502 pci_conf_read(pc, pa->pa_tag, PCI_MAPREG_START+0x0);
504 pci_conf_read(pc, pa->pa_tag, PCI_MAPREG_START+0x4)
[all...] |
| ppb.c | 98 pcireg_t bhlc = pci_conf_read(pa->pa_pc, pa->pa_tag,
226 sc->sc_tag = pa->pa_tag;
229 busdata = pci_conf_read(pc, pa->pa_tag, PCI_BRIDGE_BUS_REG);
251 if (pci_get_capability(pc, pa->pa_tag, PCI_CAP_PCIEXPRESS,
287 slcsr = pci_conf_read(pc, pa->pa_tag,
289 pci_conf_write(pc, pa->pa_tag,
294 slcap = pci_conf_read(pc, pa->pa_tag,
337 pci_conf_write(pc, pa->pa_tag,
363 reg = pci_conf_read(pc, pa->pa_tag, PCI_BRIDGE_STATIO_REG);
367 reg = pci_conf_read(pc, pa->pa_tag,
[all...] |
| if_athn_pci.c | 142 psc->psc_tag = pa->pa_tag;
152 error = pci_get_capability(pa->pa_pc, pa->pa_tag, PCI_CAP_PCIEXPRESS,
163 reg = pci_conf_read(pa->pa_pc, pa->pa_tag, 0x40);
165 pci_conf_write(pa->pa_pc, pa->pa_tag, 0x40, reg & ~0xff00);
168 reg = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_BHLC_REG);
171 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_BHLC_REG, reg);
174 reg = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBSYS_ID_REG);
185 memtype = pci_mapreg_type(pa->pa_pc, pa->pa_tag, ATHN_PCI_MMBA);
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| if_re_pci.c | 158 subid = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBSYS_ID_REG);
201 command = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
203 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, command);
210 memtype = pci_mapreg_type(pa->pa_pc, pa->pa_tag, RTK_PCI_LOMEM);
245 command = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
247 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, command);
255 command = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
257 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, command);
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| agp_apple.c | 90 pci_get_capability(pa->pa_pc, pa->pa_tag, PCI_CAP_AGP, &sc->as_capoff,
97 sc->as_tag = pa->pa_tag;
117 pci_conf_write(pa->pa_pc, pa->pa_tag, APPLE_UNINORTH_GART_BASE,
122 pci_conf_write(pa->pa_pc, pa->pa_tag, APPLE_UNINORTH_GART_CTRL,
124 pci_conf_write(pa->pa_pc, pa->pa_tag, APPLE_UNINORTH_GART_CTRL,
126 pci_conf_write(pa->pa_pc, pa->pa_tag, APPLE_UNINORTH_GART_CTRL,
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| amdpm.c | 117 sc->sc_tag = pa->pa_tag;
121 confreg = pci_conf_read(pa->pa_pc, pa->pa_tag, AMDPM_CONFREG);
128 pci_conf_write(pa->pa_pc, pa->pa_tag, AMDPM_CONFREG,
130 confreg = pci_conf_read(pa->pa_pc, pa->pa_tag, AMDPM_CONFREG);
138 pmptrreg = pci_conf_read(pa->pa_pc, pa->pa_tag, NFORCE_PMPTR);
147 pmptrreg = pci_conf_read(pa->pa_pc, pa->pa_tag, AMDPM_PMPTR);
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| if_hme_pci.c | 148 csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
149 type = pci_mapreg_type(pa->pa_pc, pa->pa_tag, PCI_HME_BASEADDR);
165 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
231 ebus_pa.pa_tag = pci_make_tag(pa->pa_pc, pa->pa_bus, pa->pa_device, 0);
233 ebus_cl = pci_conf_read(ebus_pa.pa_pc, ebus_pa.pa_tag, PCI_CLASS_REG);
234 ebus_id = pci_conf_read(ebus_pa.pa_pc, ebus_pa.pa_tag, PCI_ID_REG);
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| agp_via.c | 97 pci_get_capability(pa->pa_pc, pa->pa_tag, PCI_CAP_AGP, &sc->as_capoff,
101 agpsel = pci_conf_read(pa->pa_pc, pa->pa_tag, AGP_VIA_AGPSEL);
141 pci_conf_write(pa->pa_pc, pa->pa_tag, asc->regs[REG_ATTBASE],
144 pci_conf_write(pa->pa_pc, pa->pa_tag, asc->regs[REG_GARTCTRL],
149 pci_conf_write(pa->pa_pc, pa->pa_tag, asc->regs[REG_ATTBASE],
152 gartctrl = pci_conf_read(pa->pa_pc, pa->pa_tag,
154 pci_conf_write(pa->pa_pc, pa->pa_tag, asc->regs[REG_GARTCTRL],
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| xhci_pci.c | 125 const pcitag_t tag = pa->pa_tag;
148 csr = pci_conf_read(pa->pa_pc, pa->pa_tag,
151 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
156 memtype = pci_mapreg_type(pa->pa_pc, pa->pa_tag, PCI_CBMEM);
164 if (pci_mapreg_info(pa->pa_pc, pa->pa_tag, PCI_CBMEM, memtype,
171 if (pci_get_capability(pa->pa_pc, pa->pa_tag, PCI_CAP_MSIX, &msixoff,
177 msixtbl = pci_conf_read(pa->pa_pc, pa->pa_tag,
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| /src/sys/arch/powerpc/pci/ |
| pcib.c | 119 v = pci_conf_read(pa->pa_pc, pa->pa_tag, 0x40);
123 v = pci_conf_read(pa->pa_pc, pa->pa_tag, 0x60);
159 v = pci_conf_read(pa->pa_pc, pa->pa_tag, 0x44) & 0xffff0000;
160 pci_conf_write(pa->pa_pc, pa->pa_tag, 0x44, v);
172 v = pci_conf_read(pa->pa_pc, pa->pa_tag, 0x40) & 0x00ffffff;
174 pci_conf_write(pa->pa_pc, pa->pa_tag, 0x40, v);
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| pchb.c | 83 reg1 = pci_conf_read(pa->pa_pc, pa->pa_tag, MPC105_PICR1);
84 reg2 = pci_conf_read(pa->pa_pc, pa->pa_tag, MPC105_PICR2);
126 reg1 = pci_conf_read(pa->pa_pc, pa->pa_tag, MPC106_PICR1);
127 reg2 = pci_conf_read(pa->pa_pc, pa->pa_tag, MPC106_PICR2);
188 reg1 = pci_conf_read(pa->pa_pc, pa->pa_tag,
216 reg1 = pci_conf_read(pa->pa_pc, pa->pa_tag, IBM_82660_OPTIONS_1);
224 reg1 = pci_conf_read(pa->pa_pc, pa->pa_tag, IBM_82660_OPTIONS_3);
285 if (pci_get_capability(pa->pa_pc, pa->pa_tag, PCI_CAP_AGP,
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| /src/sys/arch/x86/pci/ |
| aapic.c | 61 reg = pci_conf_read(pa->pa_pc, pa->pa_tag, AMD8131_IOAPIC_CTL);
63 pci_conf_write(pa->pa_pc, pa->pa_tag, AMD8131_IOAPIC_CTL, reg);
65 pci_decompose_tag(pa->pa_pc, pa->pa_tag, &bus, &dev, &func);
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| pchb.c | 167 sc->sc_tag = pa->pa_tag;
181 pbnum = pci_conf_read(pa->pa_pc, pa->pa_tag, 0x44) & 0xff;
239 bcreg = pci_conf_read(pa->pa_pc, pa->pa_tag, 0x40);
262 bcreg = pci_conf_read(pa->pa_pc, pa->pa_tag,
270 pci_conf_write(pa->pa_pc, pa->pa_tag,
277 bcreg = pci_conf_read(pa->pa_pc, pa->pa_tag,
302 bcreg = pci_conf_read(pa->pa_pc, pa->pa_tag,
306 pci_conf_write(pa->pa_pc, pa->pa_tag,
417 pci_get_capability(pa->pa_pc, pa->pa_tag, PCI_CAP_AGP,
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| /src/sys/external/bsd/drm2/pci/ |
| drmfb_pci.c | 92 if (!pci_mapreg_probe(pa->pa_pc, pa->pa_tag, PCI_BAR(i),
97 if (pci_mapreg_info(pa->pa_pc, pa->pa_tag, PCI_BAR(i), type,
139 return pci_devioctl(pa->pa_pc, pa->pa_tag, cmd, data, flag, l);
143 return wsdisplayio_busid_pci(dev->dev, pa->pa_pc, pa->pa_tag,
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| /src/sys/arch/hppa/dev/ |
| sti_pci_machdep.c | 81 cf = pci_conf_read(paa->pa_pc, paa->pa_tag, bar);
83 rc = pci_mapreg_info(paa->pa_pc, paa->pa_tag, bar,
129 cf = pci_conf_read(pa->pa_pc, pa->pa_tag, bar);
131 rc = pci_mapreg_info(pa->pa_pc, pa->pa_tag, bar, PCI_MAPREG_TYPE(cf),
162 address = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_MAPREG_ROM);
163 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_MAPREG_ROM,
165 mask = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_MAPREG_ROM);
167 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_MAPREG_ROM, address);
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| ssio.c | 141 bhlc = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_BHLC_REG);
153 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_CLASS_REG,
228 reg = pci_conf_read(pa->pa_pc, pa->pa_tag, SSIO_PCI_DMA_RC2);
231 pci_conf_write(pa->pa_pc, pa->pa_tag, SSIO_PCI_DMA_RC2, reg);
237 pci_conf_write(pa->pa_pc, pa->pa_tag, SSIO_PCI_INT_TC2, reg);
241 pci_conf_write(pa->pa_pc, pa->pa_tag, SSIO_PCI_INT_RC4, reg);
265 saa.saa_iobase = pci_conf_read(pa->pa_pc, pa->pa_tag, SSIO_PCI_SP1BAR);
273 saa.saa_iobase = pci_conf_read(pa->pa_pc, pa->pa_tag, SSIO_PCI_SP2BAR);
281 saa.saa_iobase = pci_conf_read(pa->pa_pc, pa->pa_tag, SSIO_PCI_PPBAR);
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| /src/sys/external/bsd/drm2/linux/ |
| linux_pci.c | 109 npa->pa_tag = ppbsc->sc_tag;
110 pcireg_t id = pci_conf_read(npa->pa_pc, npa->pa_tag, PCI_ID_REG);
111 pcireg_t subid = pci_conf_read(npa->pa_pc, npa->pa_tag,
113 pcireg_t class = pci_conf_read(npa->pa_pc, npa->pa_tag, PCI_CLASS_REG);
120 pci_decompose_tag(npa->pa_pc, npa->pa_tag, &bus, &device, &function);
148 const uint32_t subsystem_id = pci_conf_read(pa->pa_pc, pa->pa_tag,
197 pa->pa_tag, reg);
198 if (pci_mapreg_info(pa->pa_pc, pa->pa_tag, reg,
216 return pci_get_capability(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, cap,
225 *valuep = pci_conf_read(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, reg)
[all...] |
| /src/sys/arch/evbarm/ixm1200/ |
| nappi_nppb.c | 126 psc->psc_tag = pa->pa_tag;
132 pci_conf_write(psc->psc_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
133 pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) |
137 pci_conf_write(psc->psc_pc, pa->pa_tag, 0xD8, 0x03);
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| /src/sys/arch/hpcmips/dev/ |
| mq200_pci.c | 82 psc->sc_pcitag = pa->pa_tag;
85 if (!(pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) &
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| /src/sys/arch/arm/cortex/ |
| gic_v2m.c | 126 pcitag_t tag = pa->pa_tag;
166 pcitag_t tag = pa->pa_tag;
184 pcitag_t tag = pa->pa_tag;
216 pcitag_t tag = pa->pa_tag;
236 if (!pci_get_capability(pa->pa_pc, pa->pa_tag, PCI_CAP_MSI, &off, NULL))
280 if (!pci_get_capability(pa->pa_pc, pa->pa_tag, PCI_CAP_MSIX, &off, NULL))
294 tbl = pci_conf_read(pa->pa_pc, pa->pa_tag, off + PCI_MSIX_TBLOFFSET);
297 table_size = pci_msix_count(pa->pa_pc, pa->pa_tag) * PCI_MSIX_TABLE_ENTRY_SIZE;
301 error = pci_mapreg_submap(pa, bar, pci_mapreg_type(pa->pa_pc, pa->pa_tag, bar),
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