/src/sys/arch/i386/pci/ |
amd756reg.h | 56 (pci_conf_read((ph)->ph_pc, (ph)->ph_tag, AMD756_CFG_PIR) \ 60 (pci_conf_read((ph)->ph_pc, (ph)->ph_tag, AMD756_CFG_PIR) \ 65 (pci_conf_read((ph)->ph_pc, (ph)->ph_tag, AMD756_CFG_PIR) \ 70 (pci_conf_read((ph)->ph_pc, (ph)->ph_tag, AMD756_CFG_PIR) \
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via8231reg.h | 86 ((pci_conf_read((ph)->ph_pc, (ph)->ph_tag, VIA8231_CFG_PIR) \ 89 ((pci_conf_read((ph)->ph_pc, (ph)->ph_tag, VIA8237_CFG_PIR) \ 94 (pci_conf_read((ph)->ph_pc, (ph)->ph_tag, VIA8231_CFG_PIR) \ 98 (pci_conf_read((ph)->ph_pc, (ph)->ph_tag, VIA8237_CFG_PIR) \ 109 ((pci_conf_read((ph)->ph_pc, (ph)->ph_tag, VIA8231_CFG_PIR) \ 112 ((pci_conf_read((ph)->ph_pc, (ph)->ph_tag, VIA8237_CFG_PIR) \ 117 (pci_conf_read((ph)->ph_pc, (ph)->ph_tag, VIA8231_CFG_PIR) \ 121 (pci_conf_read((ph)->ph_pc, (ph)->ph_tag, VIA8237_CFG_PIR) \
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opti82c700.c | 204 reg = pci_conf_read(ph->ph_pc, ph->ph_tag, addrofs); 226 reg = pci_conf_read(ph->ph_pc, ph->ph_tag, addrofs); 253 reg = pci_conf_read(ph->ph_pc, ph->ph_tag, addrofs); 269 reg = pci_conf_read(ph->ph_pc, ph->ph_tag, addrofs); 298 reg = pci_conf_read(ph->ph_pc, ph->ph_tag, addrofs); 318 reg = pci_conf_read(ph->ph_pc, ph->ph_tag, addrofs); 340 r = pci_conf_read(pc, tag, 0xb0 + i); 352 r = pci_conf_read(pc, tag, 0xb8);
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via82c586.c | 129 reg = pci_conf_read(pc, tag, VP3_CFG_KBDMISCCTRL12_REG); 162 reg = pci_conf_read(ph->ph_pc, ph->ph_tag, VP3_CFG_PIRQ_REG); 180 reg = pci_conf_read(ph->ph_pc, ph->ph_tag, VP3_CFG_PIRQ_REG); 207 reg = pci_conf_read(ph->ph_pc, ph->ph_tag, 237 reg = pci_conf_read(ph->ph_pc, ph->ph_tag,
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/src/sys/arch/ia64/include/ |
pci_machdep.h | 42 pcireg_t pci_conf_read(pci_chipset_tag_t, pcitag_t, int);
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/src/sys/arch/netwinder/pci/ |
pci_machdep.c | 30 intreg = pci_conf_read(pba->pba_pc, tag, PCI_INTERRUPT_REG); 48 intreg = pci_conf_read(pba->pba_pc, tag, PCI_INTERRUPT_REG); 69 pci_conf_read(pba->pba_pc, tag, 0x48)|0xff); 71 regval = pci_conf_read(pba->pba_pc, tag, 0x40); 76 regval = pci_conf_read(pba->pba_pc, tag, 0x80); 91 regval = pci_conf_read(pba->pba_pc, tag, PCI_CLASS_REG); 95 regval = pci_conf_read(pba->pba_pc, tag, 0x40); 104 intreg = pci_conf_read(pba->pba_pc, tag, PCI_INTERRUPT_REG); 115 regval = pci_conf_read(pba->pba_pc, tag, 0x40);
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/src/sys/arch/x86/pci/ |
pci_bus_fixup.c | 79 reg = pci_conf_read(pc, tag, PCI_ID_REG); 90 reg = pci_conf_read(pc, tag, PCI_BHLC_REG); 100 reg = pci_conf_read(pc, tag, PCI_ID_REG); 112 reg = pci_conf_read(pc, tag, PCI_CLASS_REG); 122 reg = pci_conf_read(pc, tag, 163 reg = pci_conf_read(pc, tag, PCI_BRIDGE_BUS_REG);
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pchb.c | 103 dev_id = pci_conf_read(pc, tag, PCI_ID_REG); 106 return pci_conf_read(pc, tag, 0x44) & 0xff; 110 bcreg = pci_conf_read(pc, tag, 0x40); 117 bcreg = pci_conf_read(pc, tag, PCISET_BUSCONFIG_REG); 127 bcreg = pci_conf_read(pc, tag, 0xd0); 133 bcreg = pci_conf_read(pc, tag, 0xd0); 139 bcreg = pci_conf_read(pc, tag, 0xd4); 181 pbnum = pci_conf_read(pa->pa_pc, pa->pa_tag, 0x44) & 0xff; 239 bcreg = pci_conf_read(pa->pa_pc, pa->pa_tag, 0x40); 262 bcreg = pci_conf_read(pa->pa_pc, pa->pa_tag [all...] |
pci_addr_fixup.c | 174 val = pci_conf_read(pc, tag, PCI_BHLC_REG); 197 val = pci_conf_read(pc, tag, mapreg); 200 mask = pci_conf_read(pc, tag, mapreg); 242 val = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG); 297 if (pciaddr_ioaddr(pci_conf_read(pc, tag, mapreg)) != *addr) { 345 id = pci_conf_read(pc, tag, PCI_ID_REG); 358 class = pci_conf_read(pc, tag, PCI_CLASS_REG); 360 status = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG); 362 rval = pci_conf_read(pc, tag, PCI_CAPLISTPTR_REG); 366 rval = pci_conf_read(pc, tag, off) [all...] |
/src/sys/dev/pci/ |
rdcide.c | 113 sc->sc_pm_reg[0] = pci_conf_read(sc->sc_pc, sc->sc_tag, 115 sc->sc_pm_reg[1] = pci_conf_read(sc->sc_pc, sc->sc_tag, 117 sc->sc_pm_reg[2] = pci_conf_read(sc->sc_pc, sc->sc_tag, 119 sc->sc_pm_reg[3] = pci_conf_read(sc->sc_pc, sc->sc_tag, 155 pci_conf_read(sc->sc_pc, sc->sc_tag, RDCIDE_PATR)), 158 pci_conf_read(sc->sc_pc, sc->sc_tag, RDCIDE_PSD1ATR)), 161 pci_conf_read(sc->sc_pc, sc->sc_tag, RDCIDE_UDCCR)), 164 pci_conf_read(sc->sc_pc, sc->sc_tag, RDCIDE_IIOCR)), 175 patr = pci_conf_read(sc->sc_pc, sc->sc_tag, RDCIDE_PATR); 185 pci_conf_read(sc->sc_pc, sc->sc_tag, RDCIDE_PATR)) [all...] |
if_ex_pci.c | 232 rev = PCI_REVISION(pci_conf_read(pc, pa->pa_tag, PCI_CLASS_REG)); 241 pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) | 247 pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 249 pci_conf_read(pc, pa->pa_tag, PCI_BHLC_REG); 251 pci_conf_read(pc, pa->pa_tag, PCI_CBIO); 264 pci_conf_read(pc, pa->pa_tag, PCI_FUNCMEM); 268 pci_conf_read(pc, pa->pa_tag, PCI_INTERRUPT_REG); 341 (void)pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG); 342 base0 = pci_conf_read(pc, tag, PCI_BAR0); 343 base1 = pci_conf_read(pc, tag, PCI_BAR1) [all...] |
puccn.c | 112 reg = pci_conf_read(pa.pa_pc, pa.pa_tag, PCI_ID_REG); 116 bhlcr = pci_conf_read(pa.pa_pc, pa.pa_tag, PCI_BHLC_REG); 125 reg = pci_conf_read(pa.pa_pc, pa.pa_tag, 130 pa.pa_id = pci_conf_read(pa.pa_pc, pa.pa_tag, 132 subsys = pci_conf_read(pa.pa_pc, pa.pa_tag, 173 base = pci_conf_read(pa.pa_pc, pa.pa_tag, desc->ports[i].bar);
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pci.c | 313 id = pci_conf_read(pc, tag, PCI_ID_REG); 322 bhlcr = pci_conf_read(pc, tag, PCI_BHLC_REG); 326 /* csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG); */ 327 pciclass = pci_conf_read(pc, tag, PCI_CLASS_REG); 423 intr = pci_conf_read(pc, tag, PCI_INTERRUPT_REG); 451 addr = pci_conf_read(pc, tag, 453 addr |= (uint64_t)pci_conf_read(pc, tag, 532 reg = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG); 537 reg = pci_conf_read(pc, tag, PCI_BHLC_REG); 550 ofs = PCI_CAPLIST_PTR(pci_conf_read(pc, tag, ofs)) [all...] |
agp_amd64.c | 166 reg = pci_conf_read(pa->pa_pc, tag, PCI_CLASS_REG); 171 reg = pci_conf_read(pa->pa_pc, tag, PCI_ID_REG); 186 reg = pci_conf_read(pa->pa_pc, tag, PCI_CLASS_REG); 191 reg = pci_conf_read(pa->pa_pc, tag, PCI_ID_REG); 222 id = pci_conf_read(pa->pa_pc, tag, PCI_ID_REG); 303 apctrl = pci_conf_read(pa->pa_pc, asc->mctrl_tag[i], 344 i = (pci_conf_read(sc->as_pc, asc->mctrl_tag[0], AGP_AMD64_APCTRL) & 368 apctrl = pci_conf_read(sc->as_pc, asc->mctrl_tag[0], 427 cachectrl = pci_conf_read(sc->as_pc, asc->mctrl_tag[i], 442 apbase = pci_conf_read(sc->as_pc, sc->as_tag, AGP_APBASE) [all...] |
agp_intel.c | 160 value = pci_conf_read(sc->as_pc, sc->as_tag, AGP_INTEL_APSIZE); 163 isc->aperture_mask = pci_conf_read(sc->as_pc, sc->as_tag, 211 pci_conf_read(sc->as_pc, sc->as_tag, AGP_INTEL_AGPCTRL) 220 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I840_MCHCFG); 228 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_INTEL_AGPCMD); 232 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I840_MCHCFG); 240 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_INTEL_NBXCFG); 263 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_INTEL_ERRSTS); 285 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_INTEL_NBXCFG); 303 apsize = pci_conf_read(sc->as_pc, sc->as_tag [all...] |
pci_map.c | 77 address = pci_conf_read(pc, tag, reg); 83 csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG); 87 mask = pci_conf_read(pc, tag, reg); 150 address = pci_conf_read(pc, tag, reg); 151 csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG); 160 mask = pci_conf_read(pc, tag, reg); 163 address1 = pci_conf_read(pc, tag, reg + 4); 166 mask1 = pci_conf_read(pc, tag, reg + 4); 316 val = pci_conf_read(pc, tag, ea_cap_ptr + PCI_EA_CAP1); 319 val = pci_conf_read(pc, tag, PCI_BHLC_REG) [all...] |
cyber.c | 52 newregs = curregs = pci_conf_read(pc, tag, SIIG10x_USR_BASE); 105 newreg = curreg = pci_conf_read(pc, tag, offset);
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agp_sis.c | 119 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_SIS_WINCTRL); 138 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_SIS_WINCTRL); 159 gws = (pci_conf_read(sc->as_pc, sc->as_tag, AGP_SIS_WINCTRL)&0x70) >> 4; 180 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_SIS_WINCTRL); 217 reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_SIS_TLBFLUSH);
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schide.c | 147 pci_conf_read(sc->sc_pc, sc->sc_tag, SCH_D0TIM), 148 pci_conf_read(sc->sc_pc, sc->sc_tag, SCH_D1TIM)), 164 pci_conf_read(sc->sc_pc, sc->sc_tag, SCH_D0TIM), 165 pci_conf_read(sc->sc_pc, sc->sc_tag, SCH_D1TIM)), 192 tim = pci_conf_read(sc->sc_pc, sc->sc_tag, timaddr);
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ppb.c | 98 pcireg_t bhlc = pci_conf_read(pa->pa_pc, pa->pa_tag, 173 reg = pci_conf_read(sc->sc_pc, sc->sc_tag, off + PCIE_LCAP); 185 reg = pci_conf_read(sc->sc_pc, sc->sc_tag, off + PCIE_LCSR); 229 busdata = pci_conf_read(pc, pa->pa_tag, PCI_BRIDGE_BUS_REG); 257 reg = pci_conf_read(sc->sc_pc, sc->sc_tag, 287 slcsr = pci_conf_read(pc, pa->pa_tag, 294 slcap = pci_conf_read(pc, pa->pa_tag, 363 reg = pci_conf_read(pc, pa->pa_tag, PCI_BRIDGE_STATIO_REG); 367 reg = pci_conf_read(pc, pa->pa_tag, 378 reg = pci_conf_read(pc, pa->pa_tag, PCI_BRIDGE_MEMORY_REG) [all...] |
/src/sys/arch/powerpc/ibm4xx/pci/ |
pchb.c | 99 class = pci_conf_read(pc, tag, PCI_CLASS_REG); 100 id = pci_conf_read(pc, tag, PCI_ID_REG); 137 class = pci_conf_read(pc, tag, PCI_CLASS_REG); 138 id = pci_conf_read(pc, tag, PCI_ID_REG); 211 x = pci_conf_read(pc, tag, 0); 219 x = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
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/src/sys/arch/atari/include/ |
pci_machdep.h | 74 pcireg_t pci_conf_read(pci_chipset_tag_t, pcitag_t, int);
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/src/sys/arch/cobalt/include/ |
pci_machdep.h | 72 pcireg_t pci_conf_read(pci_chipset_tag_t, pcitag_t, int);
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/src/sys/dev/pci/ixgbe/ |
ixgbe_osdep.c | 57 return pci_conf_read(pc, tag, reg) & __BITS(15, 0); 59 return __SHIFTOUT(pci_conf_read(pc, tag, reg - 2), 76 old = pci_conf_read(pc, tag, reg) & __BITS(31, 16); 80 old = pci_conf_read(pc, tag, reg - 2) & __BITS(15, 0);
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/src/sys/arch/macppc/macppc/ |
rbus_machdep.c | 140 x = pci_conf_read(pc, tag, PCI_ID_REG); 147 x = pci_conf_read(pc, tag, 0x8c); 152 x = pci_conf_read(pc, tag, PCI_ID_REG); 156 x = pci_conf_read(pc, tag, 0x40);
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