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Searched refs:pcie_dpm_enable_mask (Results 1 - 10 of 10) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/
smu7_hwmgr.h	`171 uint32_t pcie_dpm_enable_mask; member in struct:smu7_dpmlevel_enable_mask`
amdgpu_smu7_hwmgr.c	`2612 if (data->dpm_level_enable_mask.pcie_dpm_enable_mask) { 2614 tmp = data->dpm_level_enable_mask.pcie_dpm_enable_mask; 2722 if (data->dpm_level_enable_mask.pcie_dpm_enable_mask) { 2724 data->dpm_level_enable_mask.pcie_dpm_enable_mask); 3871 data->dpm_level_enable_mask.pcie_dpm_enable_mask = 4431 uint32_t tmp = mask & data->dpm_level_enable_mask.pcie_dpm_enable_mask;`
/src/sys/external/bsd/drm2/dist/drm/radeon/
ci_dpm.h	`115 u32 pcie_dpm_enable_mask; member in struct:ci_dpm_level_enable_mask`
radeon_ci_dpm.c	`2650 pi->dpm_level_enable_mask.pcie_dpm_enable_mask = 3849 if (pi->dpm_level_enable_mask.pcie_dpm_enable_mask) { 3852 pi->dpm_level_enable_mask.pcie_dpm_enable_mask); 4194 pi->dpm_level_enable_mask.pcie_dpm_enable_mask = 4221 pi->dpm_level_enable_mask.pcie_dpm_enable_mask) { 4223 tmp = pi->dpm_level_enable_mask.pcie_dpm_enable_mask; 4309 pi->dpm_level_enable_mask.pcie_dpm_enable_mask) { 4311 pi->dpm_level_enable_mask.pcie_dpm_enable_mask);`
/src/sys/external/bsd/drm2/dist/drm/amd/powerplay/smumgr/
amdgpu_fiji_smumgr.c	`856 data->dpm_level_enable_mask.pcie_dpm_enable_mask = 1062 while (data->dpm_level_enable_mask.pcie_dpm_enable_mask && 1063 ((data->dpm_level_enable_mask.pcie_dpm_enable_mask & 1067 while (data->dpm_level_enable_mask.pcie_dpm_enable_mask && 1068 ((data->dpm_level_enable_mask.pcie_dpm_enable_mask & 1073 ((data->dpm_level_enable_mask.pcie_dpm_enable_mask &`
amdgpu_vegam_smumgr.c	`598 data->dpm_level_enable_mask.pcie_dpm_enable_mask = 928 while (hw_data->dpm_level_enable_mask.pcie_dpm_enable_mask && 929 ((hw_data->dpm_level_enable_mask.pcie_dpm_enable_mask & 933 while (hw_data->dpm_level_enable_mask.pcie_dpm_enable_mask && 934 ((hw_data->dpm_level_enable_mask.pcie_dpm_enable_mask & 939 ((hw_data->dpm_level_enable_mask.pcie_dpm_enable_mask &`
amdgpu_tonga_smumgr.c	`537 data->dpm_level_enable_mask.pcie_dpm_enable_mask = 750 if (0 == data->dpm_level_enable_mask.pcie_dpm_enable_mask) 753 while (data->dpm_level_enable_mask.pcie_dpm_enable_mask && 754 ((data->dpm_level_enable_mask.pcie_dpm_enable_mask & 759 while (data->dpm_level_enable_mask.pcie_dpm_enable_mask && 760 ((data->dpm_level_enable_mask.pcie_dpm_enable_mask & 766 ((data->dpm_level_enable_mask.pcie_dpm_enable_mask &`
amdgpu_iceland_smumgr.c	`794 data->dpm_level_enable_mask.pcie_dpm_enable_mask = 1010 while ((data->dpm_level_enable_mask.pcie_dpm_enable_mask & 1015 while ((data->dpm_level_enable_mask.pcie_dpm_enable_mask & 1021 ((data->dpm_level_enable_mask.pcie_dpm_enable_mask &`
amdgpu_polaris10_smumgr.c	`796 data->dpm_level_enable_mask.pcie_dpm_enable_mask = 1038 while (hw_data->dpm_level_enable_mask.pcie_dpm_enable_mask && 1039 ((hw_data->dpm_level_enable_mask.pcie_dpm_enable_mask & 1043 while (hw_data->dpm_level_enable_mask.pcie_dpm_enable_mask && 1044 ((hw_data->dpm_level_enable_mask.pcie_dpm_enable_mask & 1049 ((hw_data->dpm_level_enable_mask.pcie_dpm_enable_mask &`
amdgpu_ci_smumgr.c	`1020 data->dpm_level_enable_mask.pcie_dpm_enable_mask =`

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