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    Searched refs:pct_ideal_dram_sdp_bw_after_urgent_pixel_only (Results 1 - 5 of 5) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_socbb.h 49 uint32_t pct_ideal_dram_sdp_bw_after_urgent_pixel_only; // PercentOfIdealDRAMFabricAndSDPPortBWReceivedAfterUrgLatencyPixelDataOnly member in struct:gpu_info_soc_bounding_box_v1_0
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/
display_mode_structs.h 80 double pct_ideal_dram_sdp_bw_after_urgent_pixel_only; // PercentOfIdealDRAMFabricAndSDPPortBWReceivedAfterUrgLatencyPixelDataOnly member in struct:_vcs_dpi_soc_bounding_box_st
amdgpu_display_mode_vba.c 206 soc->pct_ideal_dram_sdp_bw_after_urgent_pixel_only; // there's always that one bastard variable that's so long it throws everything out of alignment!
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/
amdgpu_dcn20_resource.c 312 .pct_ideal_dram_sdp_bw_after_urgent_pixel_only = 40.0,
3362 dcn2_0_nv12_soc.pct_ideal_dram_sdp_bw_after_urgent_pixel_only =
3363 fixed16_to_double_to_cpu(bb->pct_ideal_dram_sdp_bw_after_urgent_pixel_only);
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn21/
amdgpu_dcn21_resource.c 248 .pct_ideal_dram_sdp_bw_after_urgent_pixel_only = 80.0,

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