HomeSort by: relevance | last modified time | path
    Searched refs:sc_cl_align (Results 1 - 4 of 4) sorted by relevancy

  /src/sys/arch/hppa/gsc/
if_iee_gsc.c 219 sc->sc_cl_align = 32;
221 sc->sc_cl_align = 1;
  /src/sys/dev/ic/
i82596.c 145 * sc->sc_cl_align must be set to 1 or to the cache line size. When set to
146 * 1 no special alignment of DMA descriptors is done. If sc->sc_cl_align != 1
148 * of sc->sc_cl_align. This is needed on some hppa machines that have non DMA
152 * The MD frontend also has to set sc->sc_cl_align and sc->sc_sysbus
158 * if sc->sc_cl_align == 1 and aligned to a cache line if sc->sc_cl_align != 1.
572 KASSERT(sc->sc_cl_align > 0 && powerof2(sc->sc_cl_align));
579 sc->sc_scp_sz = roundup2(sizeof(struct iee_scp), sc->sc_cl_align);
581 sc->sc_iscp_sz = roundup2(sizeof(struct iee_iscp), sc->sc_cl_align);
    [all...]
i82596var.h 170 int sc_cl_align; member in struct:iee_softc
  /src/sys/arch/ews4800mips/sbd/
if_iee_sbdio.c 97 sc->sc_cl_align = 1;

Completed in 13 milliseconds