/src/sys/external/bsd/drm2/dist/drm/amd/amdkfd/ |
kfd_mqd_manager_v9.c | 54 uint32_t se_mask[KFD_MAX_NUM_SE] = {0}; local in function:update_cu_mask 60 q->cu_mask, q->cu_mask_count, se_mask); 63 m->compute_static_thread_mgmt_se0 = se_mask[0]; 64 m->compute_static_thread_mgmt_se1 = se_mask[1]; 65 m->compute_static_thread_mgmt_se2 = se_mask[2]; 66 m->compute_static_thread_mgmt_se3 = se_mask[3]; 67 m->compute_static_thread_mgmt_se4 = se_mask[4]; 68 m->compute_static_thread_mgmt_se5 = se_mask[5]; 69 m->compute_static_thread_mgmt_se6 = se_mask[6]; 70 m->compute_static_thread_mgmt_se7 = se_mask[7] [all...] |
kfd_mqd_manager.c | 103 uint32_t *se_mask) 119 * cu_mask[0] bit0 -> se_mask[0] bit0; 120 * cu_mask[0] bit1 -> se_mask[1] bit0; 122 * cu_mask[0] bit4 -> se_mask[0] bit1; 128 se_mask[se] |= 1 << cu;
|
kfd_mqd_manager.h | 122 uint32_t *se_mask);
|
kfd_mqd_manager_cik.c | 53 uint32_t se_mask[4] = {0}; /* 4 is the max # of SEs */ local in function:update_cu_mask 59 q->cu_mask, q->cu_mask_count, se_mask); 62 m->compute_static_thread_mgmt_se0 = se_mask[0]; 63 m->compute_static_thread_mgmt_se1 = se_mask[1]; 64 m->compute_static_thread_mgmt_se2 = se_mask[2]; 65 m->compute_static_thread_mgmt_se3 = se_mask[3];
|
kfd_mqd_manager_v10.c | 53 uint32_t se_mask[4] = {0}; /* 4 is the max # of SEs */ local in function:update_cu_mask 59 q->cu_mask, q->cu_mask_count, se_mask); 62 m->compute_static_thread_mgmt_se0 = se_mask[0]; 63 m->compute_static_thread_mgmt_se1 = se_mask[1]; 64 m->compute_static_thread_mgmt_se2 = se_mask[2]; 65 m->compute_static_thread_mgmt_se3 = se_mask[3];
|
kfd_mqd_manager_vi.c | 56 uint32_t se_mask[4] = {0}; /* 4 is the max # of SEs */ local in function:update_cu_mask 62 q->cu_mask, q->cu_mask_count, se_mask); 65 m->compute_static_thread_mgmt_se0 = se_mask[0]; 66 m->compute_static_thread_mgmt_se1 = se_mask[1]; 67 m->compute_static_thread_mgmt_se2 = se_mask[2]; 68 m->compute_static_thread_mgmt_se3 = se_mask[3];
|
/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce/ |
amdgpu_dce_stream_encoder.c | 47 enc110->se_shift->field_name, enc110->se_mask->field_name 335 if (enc110->se_mask->DP_VID_M_DOUBLE_VALUE_EN) 339 if (enc110->se_mask->DP_VID_N_MUL) 457 if (enc110->se_mask->DP_DYN_RANGE && enc110->se_mask->DP_YCBCR_RANGE) 580 if (!enc110->se_mask->HDMI_DATA_SCRAMBLE_EN) { 629 if (enc110->se_mask->HDMI_DATA_SCRAMBLE_EN) { 752 if (enc110->se_mask->HDMI_AVI_INFO_CONT && 753 enc110->se_mask->HDMI_AVI_INFO_SEND) { 787 if (enc110->se_mask->HDMI_AVI_INFO_CONT & [all...] |
dce_stream_encoder.h | 703 const struct dce_stream_encoder_mask *se_mask; member in struct:dce110_stream_encoder 713 const struct dce_stream_encoder_mask *se_mask);
|
/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/ |
amdgpu_dcn20_stream_encoder.c | 47 enc1->se_shift->field_name, enc1->se_mask->field_name 615 const struct dcn10_stream_encoder_mask *se_mask) 623 enc1->se_mask = se_mask;
|
dcn20_stream_encoder.h | 97 const struct dcn10_stream_encoder_mask *se_mask);
|
amdgpu_dcn20_resource.c | 522 static const struct dcn10_stream_encoder_mask se_mask = { variable in typeref:typename:const struct dcn10_stream_encoder_mask 1238 &se_shift, &se_mask);
|
/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/ |
amdgpu_dcn10_stream_encoder.c | 47 enc1->se_shift->field_name, enc1->se_mask->field_name 1666 const struct dcn10_stream_encoder_mask *se_mask) 1674 enc1->se_mask = se_mask;
|
dcn10_stream_encoder.h | 502 const struct dcn10_stream_encoder_mask *se_mask; member in struct:dcn10_stream_encoder 512 const struct dcn10_stream_encoder_mask *se_mask);
|
amdgpu_dcn10_resource.c | 255 static const struct dcn10_stream_encoder_mask se_mask = { variable in typeref:typename:const struct dcn10_stream_encoder_mask 865 &se_shift, &se_mask);
|
/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
amdgpu_gfx_v7_0.c | 1686 unsigned se_mask[4]; local in function:gfx_v7_0_write_harvested_raster_configs 1689 se_mask[0] = ((1 << rb_per_se) - 1) & rb_mask; 1690 se_mask[1] = (se_mask[0] << rb_per_se) & rb_mask; 1691 se_mask[2] = (se_mask[1] << rb_per_se) & rb_mask; 1692 se_mask[3] = (se_mask[2] << rb_per_se) & rb_mask; 1698 if ((num_se > 2) && ((!se_mask[0] && !se_mask[1]) | [all...] |
amdgpu_gfx_v6_0.c | 1386 unsigned se_mask[4]; local in function:gfx_v6_0_write_harvested_raster_configs 1389 se_mask[0] = ((1 << rb_per_se) - 1) & rb_mask; 1390 se_mask[1] = (se_mask[0] << rb_per_se) & rb_mask; 1391 se_mask[2] = (se_mask[1] << rb_per_se) & rb_mask; 1392 se_mask[3] = (se_mask[2] << rb_per_se) & rb_mask; 1404 if ((num_se > 1) && (!se_mask[idx] || !se_mask[idx + 1])) [all...] |
amdgpu_gfx_v8_0.c | 3516 unsigned se_mask[4]; local in function:gfx_v8_0_write_harvested_raster_configs 3519 se_mask[0] = ((1 << rb_per_se) - 1) & rb_mask; 3520 se_mask[1] = (se_mask[0] << rb_per_se) & rb_mask; 3521 se_mask[2] = (se_mask[1] << rb_per_se) & rb_mask; 3522 se_mask[3] = (se_mask[2] << rb_per_se) & rb_mask; 3528 if ((num_se > 2) && ((!se_mask[0] && !se_mask[1]) | [all...] |
/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce100/ |
amdgpu_dce100_resource.c | 253 static const struct dce_stream_encoder_mask se_mask = { variable in typeref:typename:const struct dce_stream_encoder_mask 482 &stream_enc_regs[eng_id], &se_shift, &se_mask);
|
/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce120/ |
amdgpu_dce120_resource.c | 297 static const struct dce_stream_encoder_mask se_mask = { variable in typeref:typename:const struct dce_stream_encoder_mask 750 &se_shift, &se_mask);
|
/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce110/ |
amdgpu_dce110_resource.c | 279 static const struct dce_stream_encoder_mask se_mask = { variable in typeref:typename:const struct dce_stream_encoder_mask 532 &se_shift, &se_mask);
|
/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce112/ |
amdgpu_dce112_resource.c | 294 static const struct dce_stream_encoder_mask se_mask = { variable in typeref:typename:const struct dce_stream_encoder_mask 509 &se_shift, &se_mask);
|
/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce80/ |
amdgpu_dce80_resource.c | 270 static const struct dce_stream_encoder_mask se_mask = { variable in typeref:typename:const struct dce_stream_encoder_mask 605 &se_shift, &se_mask);
|
/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn21/ |
amdgpu_dcn21_resource.c | 666 static const struct dcn10_stream_encoder_mask se_mask = { variable in typeref:typename:const struct dcn10_stream_encoder_mask 1456 &se_shift, &se_mask);
|