| /src/sys/dev/clk/ |
| clk_backend.h | 59 int (*set_parent)(void *, struct clk *, struct clk *); member in struct:clk_funcs
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| clk.c | 278 if (clk->domain->funcs->set_parent)
279 return clk->domain->funcs->set_parent(clk->domain->priv,
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| /src/sys/arch/arm/nxp/ |
| imx_ccm.c | 189 if (clk->set_parent == NULL)
192 return clk->set_parent(sc, clk, clkp_parent->name);
226 .set_parent = imx_ccm_clock_set_parent,
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| imx_ccm.h | 141 .set_parent = imx_ccm_composite_set_parent, \
250 .set_parent = imx_ccm_mux_set_parent, \
316 int (*set_parent)(struct imx_ccm_softc *, member in struct:imx_ccm_clk
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| imx6_ccm.c | 73 .set_parent = imxccm_clk_set_parent,
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| /src/sys/arch/arm/ti/ |
| ti_prcm.c | 146 if (clk->set_parent == NULL)
149 return clk->set_parent(sc, clk, clkp_parent->name);
182 .set_parent = ti_prcm_clock_set_parent,
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| ti_prcm.h | 82 int (*set_parent)(struct ti_prcm_softc *, member in struct:ti_prcm_clk
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| ti_mux_clock.c | 62 .set_parent = ti_mux_clock_set_parent,
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| /src/sys/arch/arm/amlogic/ |
| meson_clk.c | 252 if (clk->set_parent == NULL)
255 return clk->set_parent(sc, clk, clkp_parent->name);
289 .set_parent = meson_clk_clock_set_parent,
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| meson_clk.h | 355 int (*set_parent)(struct meson_clk_softc *, member in struct:meson_clk_clk
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| /src/sys/arch/arm/sunxi/ |
| sunxi_ccu.c | 251 if (clk->set_parent == NULL)
254 return clk->set_parent(sc, clk, clkp_parent->name);
288 .set_parent = sunxi_ccu_clock_set_parent,
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| sunxi_ccu.h | 198 .set_parent = sunxi_ccu_nm_set_parent, \
248 .set_parent = sunxi_ccu_div_set_parent, \
309 .set_parent = sunxi_ccu_prediv_set_parent, \
441 .set_parent = sunxi_ccu_mux_set_parent, \
471 int (*set_parent)(struct sunxi_ccu_softc *, member in struct:sunxi_ccu_clk
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| sun4i_a10_ccu.c | 430 .set_parent = sunxi_ccu_div_set_parent,
447 .set_parent = sunxi_ccu_div_set_parent,
463 .set_parent = sunxi_ccu_div_set_parent,
479 .set_parent = sunxi_ccu_div_set_parent,
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| sunxi_rtc.c | 329 .set_parent = sunxi_rtc_clk_set_parent,
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| /src/sys/arch/arm/rockchip/ |
| rk_cru.c | 241 if (clk->set_parent == NULL)
244 return clk->set_parent(sc, clk, clkp_parent->name);
278 .set_parent = rk_cru_clock_set_parent,
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| rk_cru.h | 209 .set_parent = rk_cru_arm_set_parent, \
229 .set_parent = rk_cru_arm_set_parent
318 .set_parent = rk_cru_composite_set_parent, \
402 .set_parent = rk_cru_mux_set_parent, \
436 int (*set_parent)(struct rk_cru_softc *, member in struct:rk_cru_clk
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| /src/sys/arch/arm/altera/ |
| cycv_clkmgr.c | 53 .set_parent = cycv_clkmgr_clock_set_parent,
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| /src/sys/arch/riscv/starfive/ |
| jh71x0_clkc.c | 729 .set_parent = jh71x0_clkc_set_parent,
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| /src/sys/arch/arm/samsung/ |
| exynos5410_clock.c | 127 .set_parent = exynos5410_clock_set_parent,
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| exynos5422_clock.c | 271 .set_parent = exynos5422_clock_set_parent,
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| /src/sys/arch/arm/nvidia/ |
| tegra124_car.c | 288 .set_parent = tegra124_car_clock_set_parent,
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| tegra210_car.c | 300 .set_parent = tegra210_car_clock_set_parent,
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