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      1 /* $NetBSD: ti_mux_clock.c,v 1.2 2021/01/27 03:10:20 thorpej Exp $ */
      2 
      3 /*-
      4  * Copyright (c) 2019 Jared McNeill <jmcneill (at) invisible.ca>
      5  * All rights reserved.
      6  *
      7  * Redistribution and use in source and binary forms, with or without
      8  * modification, are permitted provided that the following conditions
      9  * are met:
     10  * 1. Redistributions of source code must retain the above copyright
     11  *    notice, this list of conditions and the following disclaimer.
     12  * 2. Redistributions in binary form must reproduce the above copyright
     13  *    notice, this list of conditions and the following disclaimer in the
     14  *    documentation and/or other materials provided with the distribution.
     15  *
     16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     17  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     19  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     20  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
     21  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
     22  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
     23  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
     24  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     26  * SUCH DAMAGE.
     27  */
     28 
     29 #include <sys/cdefs.h>
     30 __KERNEL_RCSID(0, "$NetBSD: ti_mux_clock.c,v 1.2 2021/01/27 03:10:20 thorpej Exp $");
     31 
     32 #include <sys/param.h>
     33 #include <sys/systm.h>
     34 #include <sys/device.h>
     35 #include <sys/kmem.h>
     36 #include <sys/bus.h>
     37 
     38 #include <dev/clk/clk_backend.h>
     39 
     40 #include <dev/fdt/fdtvar.h>
     41 
     42 static int	ti_mux_clock_match(device_t, cfdata_t, void *);
     43 static void	ti_mux_clock_attach(device_t, device_t, void *);
     44 
     45 static struct clk *ti_mux_clock_decode(device_t, int, const void *, size_t);
     46 
     47 static const struct fdtbus_clock_controller_func ti_mux_clock_fdt_funcs = {
     48 	.decode = ti_mux_clock_decode
     49 };
     50 
     51 static struct clk *ti_mux_clock_get(void *, const char *);
     52 static void	ti_mux_clock_put(void *, struct clk *);
     53 static u_int	ti_mux_clock_get_rate(void *, struct clk *);
     54 static struct clk *ti_mux_clock_get_parent(void *, struct clk *);
     55 static int	ti_mux_clock_set_parent(void *, struct clk *, struct clk *);
     56 
     57 static const struct clk_funcs ti_mux_clock_clk_funcs = {
     58 	.get = ti_mux_clock_get,
     59 	.put = ti_mux_clock_put,
     60 	.get_rate = ti_mux_clock_get_rate,
     61 	.get_parent = ti_mux_clock_get_parent,
     62 	.set_parent = ti_mux_clock_set_parent,
     63 };
     64 
     65 struct ti_mux_clock_softc {
     66 	device_t		sc_dev;
     67 	int			sc_phandle;
     68 	bus_space_tag_t		sc_bst;
     69 	bus_space_handle_t	sc_bsh;
     70 
     71 	struct clk_domain	sc_clkdom;
     72 	struct clk		sc_clk;
     73 	u_int			sc_nparent;
     74 
     75 	uint32_t		sc_mask;
     76 	u_int			sc_start_index;
     77 };
     78 
     79 #define	RD4(sc, reg)			\
     80 	bus_space_read_4((sc)->sc_bst, (sc)->sc_bsh, (reg))
     81 #define	WR4(sc, reg, val)		\
     82 	bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))
     83 
     84 CFATTACH_DECL_NEW(ti_mux_clock, sizeof(struct ti_mux_clock_softc),
     85     ti_mux_clock_match, ti_mux_clock_attach, NULL, NULL);
     86 
     87 static const struct device_compatible_entry compat_data[] = {
     88 	{ .compat = "ti,mux-clock" },
     89 	DEVICE_COMPAT_EOL
     90 };
     91 
     92 static int
     93 ti_mux_clock_match(device_t parent, cfdata_t cf, void *aux)
     94 {
     95 	const struct fdt_attach_args *faa = aux;
     96 
     97 	return of_compatible_match(faa->faa_phandle, compat_data);
     98 }
     99 
    100 static void
    101 ti_mux_clock_attach(device_t parent, device_t self, void *aux)
    102 {
    103 	struct ti_mux_clock_softc * const sc = device_private(self);
    104 	const struct fdt_attach_args *faa = aux;
    105 	const int phandle = faa->faa_phandle;
    106 	bus_addr_t addr, base_addr;
    107 	u_int shift;
    108 
    109 	const int prcm_phandle = OF_parent(OF_parent(phandle));
    110 	if (fdtbus_get_reg(phandle, 0, &addr, NULL) != 0 ||
    111 	    fdtbus_get_reg(prcm_phandle, 0, &base_addr, NULL) != 0) {
    112 		aprint_error(": couldn't get registers\n");
    113 		return;
    114 	}
    115 
    116 	sc->sc_dev = self;
    117 	sc->sc_phandle = phandle;
    118 	sc->sc_bst = faa->faa_bst;
    119 	if (bus_space_map(sc->sc_bst, base_addr + addr, 4, 0, &sc->sc_bsh) != 0) {
    120 		aprint_error(": couldn't map registers\n");
    121 		return;
    122 	}
    123 
    124 	sc->sc_nparent = fdtbus_clock_count(phandle, "clocks");
    125 	sc->sc_start_index = of_hasprop(phandle, "ti,index-starts-at-one") ? 1 : 0;
    126 	sc->sc_nparent += sc->sc_start_index;
    127 	while (!powerof2(sc->sc_nparent))
    128 		sc->sc_nparent++;
    129 
    130 	if (of_getprop_uint32(phandle, "ti,bit-shift", &shift) != 0)
    131 		shift = 0;
    132 
    133 	sc->sc_mask = (sc->sc_nparent - 1) << shift;
    134 
    135 	sc->sc_clkdom.name = device_xname(self);
    136 	sc->sc_clkdom.funcs = &ti_mux_clock_clk_funcs;
    137 	sc->sc_clkdom.priv = sc;
    138 
    139 	sc->sc_clk.domain = &sc->sc_clkdom;
    140 	sc->sc_clk.name = kmem_asprintf("%s", faa->faa_name);
    141 	clk_attach(&sc->sc_clk);
    142 
    143 	aprint_naive("\n");
    144 	aprint_normal(": TI mux clock (%s)\n", sc->sc_clk.name);
    145 
    146 	fdtbus_register_clock_controller(self, phandle, &ti_mux_clock_fdt_funcs);
    147 }
    148 
    149 static struct clk *
    150 ti_mux_clock_decode(device_t dev, int cc_phandle, const void *data,
    151 		     size_t len)
    152 {
    153 	struct ti_mux_clock_softc * const sc = device_private(dev);
    154 
    155 	return &sc->sc_clk;
    156 }
    157 
    158 static struct clk *
    159 ti_mux_clock_get(void *priv, const char *name)
    160 {
    161 	struct ti_mux_clock_softc * const sc = priv;
    162 
    163 	return &sc->sc_clk;
    164 }
    165 
    166 static void
    167 ti_mux_clock_put(void *priv, struct clk *clk)
    168 {
    169 }
    170 
    171 static u_int
    172 ti_mux_clock_get_rate(void *priv, struct clk *clk)
    173 {
    174 	struct clk *clk_parent = clk_get_parent(clk);
    175 
    176 	if (clk_parent == NULL)
    177 		return 0;
    178 
    179 	return clk_get_rate(clk_parent);
    180 }
    181 
    182 static struct clk *
    183 ti_mux_clock_get_parent(void *priv, struct clk *clk)
    184 {
    185 	struct ti_mux_clock_softc * const sc = priv;
    186 	uint32_t val;
    187 	u_int sel;
    188 
    189 	val = RD4(sc, 0);
    190 	sel = __SHIFTOUT(val, sc->sc_mask);
    191 
    192 	return fdtbus_clock_get_index(sc->sc_phandle, sel - sc->sc_start_index);
    193 }
    194 
    195 static int
    196 ti_mux_clock_set_parent(void *priv, struct clk *clk, struct clk *parent_clk)
    197 {
    198 	struct ti_mux_clock_softc * const sc = priv;
    199 	uint32_t val;
    200 	u_int sel;
    201 
    202 	for (sel = sc->sc_start_index; sel < sc->sc_nparent; sel++) {
    203 		if (fdtbus_clock_get_index(sc->sc_phandle, sel - sc->sc_start_index) == parent_clk)
    204 			break;
    205 	}
    206 	if (sel == sc->sc_nparent)
    207 		return EINVAL;
    208 
    209 	val = RD4(sc, 0);
    210 	val &= ~sc->sc_mask;
    211 	val |= __SHIFTIN(sel, sc->sc_mask);
    212 	WR4(sc, 0, val);
    213 
    214 	return 0;
    215 }
    216