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    Searched refs:simd (Results 1 - 7 of 7) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_gfx.h 197 void (*read_wave_data)(struct amdgpu_device *adev, uint32_t simd,
199 void (*read_wave_vgprs)(struct amdgpu_device *adev, uint32_t simd,
202 void (*read_wave_sgprs)(struct amdgpu_device *adev, uint32_t simd,
amdgpu_debugfs.c 694 * Bits 23..30: CU/{WGP+SIMD} selector
696 * Bits 37..44: SIMD ID selector
708 uint32_t offset, se, sh, cu, wave, simd, data[32]; local in function:amdgpu_debugfs_wave_read
719 simd = (*pos & GENMASK_ULL(44, 37)) >> 37;
731 adev->gfx.funcs->read_wave_data(adev, simd, wave, data, &x);
772 * Bits 28..35: CU/{WGP+SIMD} selector
774 * Bits 37..44: SIMD ID selector
787 uint32_t offset, se, sh, cu, wave, simd, thread, bank, *data; local in function:amdgpu_debugfs_gpr_read
798 simd = (*pos & GENMASK_ULL(51, 44)) >> 44;
816 adev->gfx.funcs->read_wave_vgprs(adev, simd, wave, thread, offset, size>>2, data)
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amdgpu_gfx_v6_0.c 2991 static uint32_t wave_read_ind(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint32_t address)
2995 (simd << SQ_IND_INDEX__SIMD_ID__SHIFT) |
3001 static void wave_read_regs(struct amdgpu_device *adev, uint32_t simd,
3007 (simd << SQ_IND_INDEX__SIMD_ID__SHIFT) |
3016 static void gfx_v6_0_read_wave_data(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint32_t *dst, int *no_fields)
3020 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_STATUS);
3021 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_LO);
3022 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_HI);
3023 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_LO);
3024 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_HI)
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amdgpu_gfx_v7_0.c 4149 static uint32_t wave_read_ind(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint32_t address)
4153 (simd << SQ_IND_INDEX__SIMD_ID__SHIFT) |
4159 static void wave_read_regs(struct amdgpu_device *adev, uint32_t simd,
4165 (simd << SQ_IND_INDEX__SIMD_ID__SHIFT) |
4174 static void gfx_v7_0_read_wave_data(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint32_t *dst, int *no_fields)
4178 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_STATUS);
4179 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_LO);
4180 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_HI);
4181 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_LO);
4182 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_HI)
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amdgpu_gfx_v8_0.c 5213 static uint32_t wave_read_ind(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint32_t address)
5217 (simd << SQ_IND_INDEX__SIMD_ID__SHIFT) |
5223 static void wave_read_regs(struct amdgpu_device *adev, uint32_t simd,
5229 (simd << SQ_IND_INDEX__SIMD_ID__SHIFT) |
5238 static void gfx_v8_0_read_wave_data(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint32_t *dst, int *no_fields)
5242 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_STATUS);
5243 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_LO);
5244 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_HI);
5245 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_LO);
5246 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_HI)
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amdgpu_gfx_v9_0.c 1924 static uint32_t wave_read_ind(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint32_t address)
1928 (simd << SQ_IND_INDEX__SIMD_ID__SHIFT) |
1934 static void wave_read_regs(struct amdgpu_device *adev, uint32_t simd,
1940 (simd << SQ_IND_INDEX__SIMD_ID__SHIFT) |
1949 static void gfx_v9_0_read_wave_data(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint32_t *dst, int *no_fields)
1953 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_STATUS);
1954 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_LO);
1955 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_HI);
1956 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_LO);
1957 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_HI)
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amdgpu_gfx_v10_0.c 1131 static void gfx_v10_0_read_wave_data(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint32_t *dst, int *no_fields)
1136 WARN_ON(simd != 0);
1157 static void gfx_v10_0_read_wave_sgprs(struct amdgpu_device *adev, uint32_t simd,
1161 WARN_ON(simd != 0);
1168 static void gfx_v10_0_read_wave_vgprs(struct amdgpu_device *adev, uint32_t simd,

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