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    Searched refs:smum_send_msg_to_smc (Results 1 - 22 of 22) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/
amdgpu_vega20_baco.c 108 if (smum_send_msg_to_smc(hwmgr, PPSMC_MSG_ExitBaco))
126 return smum_send_msg_to_smc(hwmgr, PPSMC_MSG_BacoWorkAroundFlushVDCI);
amdgpu_smu7_clockpowergating.c 35 return smum_send_msg_to_smc(hwmgr, enable ?
42 return smum_send_msg_to_smc(hwmgr, enable ?
64 return smum_send_msg_to_smc(hwmgr,
88 return smum_send_msg_to_smc(hwmgr,
96 return smum_send_msg_to_smc(hwmgr,
433 return smum_send_msg_to_smc(hwmgr,
amdgpu_smu7_thermal.c 160 result = smum_send_msg_to_smc(hwmgr, PPSMC_StartFanControl);
173 result = smum_send_msg_to_smc(hwmgr, PPSMC_StartFanControl);
191 return smum_send_msg_to_smc(hwmgr, PPSMC_StopFanControl);
380 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_Thermal_Cntl_Enable);
398 return smum_send_msg_to_smc(hwmgr, PPSMC_MSG_Thermal_Cntl_Disable);
amdgpu_smu10_hwmgr.c 334 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_DisableGfxOff);
354 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_EnableGfxOff);
489 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetMinGfxclkFrequency);
493 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetMaxGfxclkFrequency);
898 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetGfxclkFrequency);
920 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetFclkFrequency);
1132 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetGfxclkFrequency);
1139 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetFclkFrequency);
1176 return smum_send_msg_to_smc(hwmgr, PPSMC_MSG_SetRccPfcPmeRestoreRegister);
1181 return smum_send_msg_to_smc(hwmgr, PPSMC_MSG_PowerGateMmHub)
    [all...]
amdgpu_smu7_hwmgr.c 197 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_Voltage_Cntl_Enable);
504 return smum_send_msg_to_smc(hwmgr, PPSMC_MSG_ResetToDefaults);
989 return smum_send_msg_to_smc(hwmgr,
1007 return smum_send_msg_to_smc(hwmgr, PPSMC_MSG_EnableULV);
1017 return smum_send_msg_to_smc(hwmgr, PPSMC_MSG_DisableULV);
1026 if (smum_send_msg_to_smc(hwmgr, PPSMC_MSG_MASTER_DeepSleep_ON))
1031 if (smum_send_msg_to_smc(hwmgr,
1046 if (smum_send_msg_to_smc(hwmgr,
1100 (0 == smum_send_msg_to_smc(hwmgr, PPSMC_MSG_DPM_Enable)),
1111 (0 == smum_send_msg_to_smc(hwmgr
    [all...]
amdgpu_vega10_baco.c 106 if (smum_send_msg_to_smc(hwmgr, PPSMC_MSG_EnterBaco))
amdgpu_vega12_thermal.c 39 PP_ASSERT_WITH_CODE(!smum_send_msg_to_smc(hwmgr,
amdgpu_smu8_hwmgr.c 172 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetMaxSclkLevel);
598 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetMaxUvdLevel);
625 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetMaxEclkLevel);
652 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetMaxAclkLevel);
675 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_ACPPowerOFF);
1237 return smum_send_msg_to_smc(hwmgr, PPSMC_MSG_UVDPowerOFF);
1285 return smum_send_msg_to_smc(hwmgr,
1293 return smum_send_msg_to_smc(hwmgr,
1763 result = smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetAverageGraphicsActivity);
1908 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_ACPPowerOFF)
    [all...]
amdgpu_vega20_thermal.c 113 PP_ASSERT_WITH_CODE((ret = smum_send_msg_to_smc(hwmgr,
amdgpu_vega10_hwmgr.c 494 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetSmuVersion);
513 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_ReadSerialNumTop32);
515 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_ReadSerialNumBottom32);
2313 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_InitializeAcg);
2315 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_RunAcgBtc);
2320 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_RunAcgInClosedLoop);
2322 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_RunAcgInOpenLoop);
2439 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_ReadSerialNumTop32);
2442 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_ReadSerialNumBottom32);
3811 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetCurrPkgPwr)
    [all...]
amdgpu_smu7_powertune.c 1016 result = smum_send_msg_to_smc(hwmgr,
1049 result = smum_send_msg_to_smc(hwmgr,
1070 smc_result = smum_send_msg_to_smc(hwmgr,
1086 int smc_result = smum_send_msg_to_smc(hwmgr,
1131 smc_result = smum_send_msg_to_smc(hwmgr,
1141 smc_result = smum_send_msg_to_smc(hwmgr,
1170 smc_result = smum_send_msg_to_smc(hwmgr,
1179 smc_result = smum_send_msg_to_smc(hwmgr,
1188 smc_result = smum_send_msg_to_smc(hwmgr,
amdgpu_vega12_hwmgr.c 367 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_ReadSerialNumTop32);
369 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_ReadSerialNumBottom32);
777 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_RunAcgBtc) == 0,
838 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_EnableAllSmuFeatures) == 0,
864 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_DisableAllSmuFeatures) == 0,
2615 ret = smum_send_msg_to_smc(hwmgr, PPSMC_MSG_AllowGfxOff);
2627 ret = smum_send_msg_to_smc(hwmgr, PPSMC_MSG_DisallowGfxOff);
2664 PP_ASSERT_WITH_CODE((ret = smum_send_msg_to_smc(hwmgr, msg)) == 0,
amdgpu_vega10_thermal.c 39 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetCurrentRpm);
amdgpu_vega20_hwmgr.c 102 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetSmuVersion);
410 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_ReadSerialNumTop32);
412 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_ReadSerialNumBottom32);
924 return smum_send_msg_to_smc(hwmgr, PPSMC_MSG_RunBtc);
929 return smum_send_msg_to_smc(hwmgr, PPSMC_MSG_RunAfllBtc);
941 PP_ASSERT_WITH_CODE((ret = smum_send_msg_to_smc(hwmgr,
999 PP_ASSERT_WITH_CODE((ret = smum_send_msg_to_smc(hwmgr,
1649 result = smum_send_msg_to_smc(hwmgr,
3149 PP_ASSERT_WITH_CODE((ret = smum_send_msg_to_smc(hwmgr, msg)) == 0,
  /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/inc/
smumgr.h 92 extern int smum_send_msg_to_smc(struct pp_hwmgr *hwmgr, uint16_t msg);
  /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/smumgr/
amdgpu_smumgr.c 143 int smum_send_msg_to_smc(struct pp_hwmgr *hwmgr, uint16_t msg) function
amdgpu_smu10_smumgr.c 225 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetSmuVersion);
amdgpu_fiji_smumgr.c 2250 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_EnableAvfs);
2577 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_SCLKDPM_FreezeLevel);
2607 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_SCLKDPM_UnfreezeLevel);
2612 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_MCLKDPM_FreezeLevel);
2642 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_MCLKDPM_UnfreezeLevel);
amdgpu_polaris10_smumgr.c 2059 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_EnableAvfs);
2065 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_ApplyAvfsCksOffVoltage);
2493 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_SCLKDPM_FreezeLevel);
2523 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_SCLKDPM_UnfreezeLevel);
2528 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_MCLKDPM_FreezeLevel);
2558 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_MCLKDPM_UnfreezeLevel);
amdgpu_vegam_smumgr.c 2068 !smum_send_msg_to_smc(hwmgr, PPSMC_MSG_UseNewGPIOScheme))
2258 ret = smum_send_msg_to_smc(hwmgr, PPSMC_MSG_EnableAvfs);
2261 ret = smum_send_msg_to_smc(hwmgr, PPSMC_MSG_ApplyAvfsCksOffVoltage);
amdgpu_ci_smumgr.c 2788 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_SCLKDPM_FreezeLevel);
2818 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_SCLKDPM_UnfreezeLevel);
2823 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_MCLKDPM_FreezeLevel);
2853 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_MCLKDPM_UnfreezeLevel);
amdgpu_tonga_smumgr.c 3176 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_SCLKDPM_FreezeLevel);
3206 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_SCLKDPM_UnfreezeLevel);
3211 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_MCLKDPM_FreezeLevel);
3241 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_MCLKDPM_UnfreezeLevel);

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