| /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
| amdgpu_socbb.h | 32 uint32_t socclk_mhz; member in struct:gpu_info_voltage_scaling_v1_0
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/inc/hw/ |
| clk_mgr.h | 58 unsigned int socclk_mhz; member in struct:clk_limit_table_entry
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/ |
| display_mode_structs.h | 61 double socclk_mhz; member in struct:_vcs_dpi_voltage_scaling_st
353 double socclk_mhz; member in struct:_vcs_dpi_display_clocks_and_cfg_st
|
| amdgpu_display_mode_vba.c | 248 mode_lib->vba.SOCCLK = soc->clock_limits[i].socclk_mhz;
264 mode_lib->vba.SOCCLKPerState[i] = soc->clock_limits[i].socclk_mhz;
835 mode_lib->vba.SOCCLK = mode_lib->vba.cache_pipes[0].clks_cfg.socclk_mhz;
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/ |
| amdgpu_dcn20_resource.c | 241 .socclk_mhz = 560.0,
252 .socclk_mhz = 694.0,
263 .socclk_mhz = 875.0,
274 .socclk_mhz = 1000.0,
285 .socclk_mhz = 1200.0,
297 .socclk_mhz = 1200.0,
2720 pipes[0].clks_cfg.socclk_mhz = context->bw_ctx.dml.soc.clock_limits[vlevel].socclk_mhz;
2726 pipes[0].clks_cfg.socclk_mhz = context->bw_ctx.dml.soc.clock_limits[1].socclk_mhz;
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn21/ |
| amdgpu_dcn21_resource.c | 176 .socclk_mhz = 278.0,
187 .socclk_mhz = 278.0,
198 .socclk_mhz = 278.0,
209 .socclk_mhz = 715.0,
220 .socclk_mhz = 953.0,
232 .socclk_mhz = 953.0,
992 pipes[0].clks_cfg.socclk_mhz = dml->soc.clock_limits[vlevel].socclk_mhz;
1354 dcn2_1_soc.clock_limits[i].socclk_mhz = clk_table->entries[i].socclk_mhz;
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/clk_mgr/dcn21/ |
| amdgpu_rn_clk_mgr.c | 522 .socclk_mhz = 0,
529 .socclk_mhz = 0,
536 .socclk_mhz = 0,
543 .socclk_mhz = 0,
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/calcs/ |
| amdgpu_dcn_calcs.c | 486 input.clks_cfg.socclk_mhz = v->socclk;
|
