| /src/sys/arch/sparc/dev/ |
| sxreg.h | 218 #define SX_ST(sreg, cnt, o) (0x80000000 | ((cnt) << 23) | SX_STORE | \
219 SX_LONG | (sreg << 7) | (o))
220 #define SX_STM(sreg, cnt, o) (0x80000000 | ((cnt) << 23) | SX_STORE_MASK | \
221 SX_LONG | (sreg << 7) | (o))
222 #define SX_STB(sreg, cnt, o) (0x80000000 | ((cnt) << 23) | SX_STORE | \
223 SX_UBYTE_0 | (sreg << 7) | (o))
224 #define SX_STBM(sreg, cnt, o) (0x80000000 | ((cnt) << 23) | SX_STORE_MASK | \
225 SX_UBYTE_0 | (sreg << 7) | (o))
226 #define SX_STBC(sreg, cnt, o) (0x80000000 | ((cnt) << 23) | SX_STORE_CLAMP | \
227 SX_UBYTE_0 | (sreg << 7) | (o)
[all...] |
| /src/sys/dev/spi/ |
| tmp121.c | 147 int16_t sreg; local
155 sreg = (int16_t)be16toh(reg);
167 sreg >>= 3;
168 val = sreg * 62500 + 273150000;
|
| /src/sys/arch/vax/boot/boot/ |
| mfm.c | 80 static volatile struct hdc9224_UDCreg sreg; /* input */ variable in typeref:struct:hdc9224_UDCreg
103 p = (void *) &sreg;
145 if (error == 0 && (sreg.udc_dstat & UDC_DS_READY) == UDC_DS_READY)
147 printf("diskette not ready(%d): %#x/%#x\n", cnt, error, sreg.udc_dstat);
191 if (sreg.udc_dstat & UDC_DS_TRK00)
261 if (sreg.udc_cstat & UDC_CS_ECCERR) {
264 sreg.udc_csect, sreg.udc_chead, sreg.udc_ccyl,
266 if (sreg.udc_csect != creg.udc_dsect + creg.udc_scnt - 1)
[all...] |
| /src/sys/arch/sun3/dev/ |
| sebuf.c | 87 struct se_regs *sreg; local
102 sreg = bus_tmapin(ca->ca_bustype, pa);
104 sreg->se_csr = 0xFFF3;
105 x = peek_word((void *)(&sreg->se_csr));
106 bus_tmapout(sreg);
|
| /src/external/apache2/llvm/dist/clang/include/clang/StaticAnalyzer/Core/PathSensitive/ |
| MemRegion.h | 441 SubRegion(const MemRegion *sReg, Kind k) : MemRegion(k), superRegion(sReg) {
443 assert(sReg);
502 TypedRegion(const MemRegion *sReg, Kind k) : SubRegion(sReg, k) {
526 TypedValueRegion(const MemRegion* sReg, Kind k) : TypedRegion(sReg, k) {
557 CodeTextRegion(const MemSpaceRegion *sreg, Kind k) : TypedRegion(sreg, k) {
576 FunctionCodeRegion(const NamedDecl *fd, const CodeSpaceRegion* sreg)
[all...] |
| /src/external/gpl3/gdb/dist/sim/ppc/ |
| vm.h | 136 sreg *srs,
|
| registers.h | 195 typedef uint32_t sreg; typedef
276 sreg sr[nr_of_srs];
|
| registers.c | 120 description.size = sizeof(sreg);
|
| psim.c | 806 sreg sreg; member in union:__anon19927
839 cooked_buf.sreg = cpu_registers(processor)->sr[description.index];
967 sreg sreg; member in union:__anon19928
1039 cpu_registers(processor)->sr[description.index] = cooked_buf.sreg;
|
| vm.c | 866 sreg *srs,
872 sreg new_sr_value = 0;
903 sreg *srs,
922 sreg *srs,
|
| /src/external/gpl3/gdb.old/dist/sim/ppc/ |
| vm.h | 136 sreg *srs,
|
| registers.h | 195 typedef uint32_t sreg; typedef
276 sreg sr[nr_of_srs];
|
| registers.c | 120 description.size = sizeof(sreg);
|
| psim.c | 806 sreg sreg; member in union:__anon760
839 cooked_buf.sreg = cpu_registers(processor)->sr[description.index];
967 sreg sreg; member in union:__anon761
1039 cpu_registers(processor)->sr[description.index] = cooked_buf.sreg;
|
| vm.c | 866 sreg *srs,
872 sreg new_sr_value = 0;
903 sreg *srs,
922 sreg *srs,
|
| /src/external/gpl3/gcc/dist/gcc/ |
| dwarf2cfi.cc | 976 If SREG is INVALID_REGISTER, the register is saved at OFFSET from the CFA;
977 otherwise it is saved in SREG. */
980 reg_save (unsigned int reg, struct cfa_reg sreg, poly_int64 offset)
987 if (sreg.reg == INVALID_REGNUM)
1017 else if (sreg.reg == reg)
1025 else if (sreg.span > 1)
1029 cfi->dw_cfi_oprnd2.dw_cfi_loc = build_span_loc (sreg);
1034 cfi->dw_cfi_oprnd2.dw_cfi_reg_num = sreg.reg;
1210 SREG, or if SREG is NULL then it is saved at OFFSET to the CFA. *
1239 struct cfa_reg sreg; local
[all...] |
| /src/external/gpl3/gcc.old/dist/gcc/ |
| dwarf2cfi.cc | 976 If SREG is INVALID_REGISTER, the register is saved at OFFSET from the CFA;
977 otherwise it is saved in SREG. */
980 reg_save (unsigned int reg, struct cfa_reg sreg, poly_int64 offset)
987 if (sreg.reg == INVALID_REGNUM)
1017 else if (sreg.reg == reg)
1025 else if (sreg.span > 1)
1029 cfi->dw_cfi_oprnd2.dw_cfi_loc = build_span_loc (sreg);
1034 cfi->dw_cfi_oprnd2.dw_cfi_reg_num = sreg.reg;
1210 SREG, or if SREG is NULL then it is saved at OFFSET to the CFA. *
1239 struct cfa_reg sreg; local
[all...] |
| /src/external/gpl3/gdb.old/dist/sim/arm/ |
| armsupp.c | 632 int sreg = (BITS (12, 15) << 1) | BIT (22); local
636 ARMul_StoreWordN (state, address, VFP_uword (sreg));
638 sreg += 1;
780 int sreg = (BITS (12, 15) << 1) | BIT (22); local
785 VFP_uword (sreg) = ARMul_LoadWordN (state, address);
787 sreg += 1;
|
| /src/external/gpl3/gdb.old/dist/gdb/ |
| mips-tdep.c | 3008 int sreg; local
3054 sreg = b0s5_reg (insn >> 16);
3060 && dreg == MIPS_SP_REGNUM && sreg == MIPS_SP_REGNUM
3067 || dreg != 28 || sreg != 28 || treg != MIPS_T9_REGNUM)
3074 reglist = sreg = b5s5_reg (insn >> 16);
3079 && breg == MIPS_SP_REGNUM && sreg < MIPS_RA_REGNUM)
3084 sreg, sp + offset);
3086 sreg + 1, sp + offset + s);
3115 sreg = b0s5_reg (insn >> 16);
3118 if (sreg == MIPS_SP_REGNUM && dreg == MIPS_SP_REGNUM
4354 int sreg; local
6781 int sreg; local
[all...] |
| /src/external/gpl3/gdb/dist/gdb/ |
| mips-tdep.c | 3013 int sreg; local
3059 sreg = b0s5_reg (insn >> 16);
3065 && dreg == MIPS_SP_REGNUM && sreg == MIPS_SP_REGNUM
3072 || dreg != 28 || sreg != 28 || treg != MIPS_T9_REGNUM)
3079 reglist = sreg = b5s5_reg (insn >> 16);
3084 && breg == MIPS_SP_REGNUM && sreg < MIPS_RA_REGNUM)
3089 sreg, sp + offset);
3091 sreg + 1, sp + offset + s);
3120 sreg = b0s5_reg (insn >> 16);
3123 if (sreg == MIPS_SP_REGNUM && dreg == MIPS_SP_REGNUM
4357 int sreg; local
6786 int sreg; local
[all...] |
| /src/external/gpl3/gcc/dist/gcc/config/mcore/ |
| mcore.cc | 1467 rtx mreg, sreg, ereg;
1536 sreg = copy_to_mode_reg (SImode, operands[3]);
1546 emit_insn (gen_rtx_SET (sreg, gen_rtx_AND (SImode, sreg, ereg)));
1551 emit_insn (gen_rtx_SET (sreg, gen_rtx_ASHIFT (SImode, sreg,
1555 gen_rtx_IOR (SImode, operands[0], sreg)));
1464 rtx mreg, sreg, ereg; local
|
| /src/external/gpl3/gcc.old/dist/gcc/config/mcore/ |
| mcore.cc | 1467 rtx mreg, sreg, ereg;
1536 sreg = copy_to_mode_reg (SImode, operands[3]);
1546 emit_insn (gen_rtx_SET (sreg, gen_rtx_AND (SImode, sreg, ereg)));
1551 emit_insn (gen_rtx_SET (sreg, gen_rtx_ASHIFT (SImode, sreg,
1555 gen_rtx_IOR (SImode, operands[0], sreg)));
1464 rtx mreg, sreg, ereg; local
|
| /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/subdev/bios/ |
| nouveau_nvkm_subdev_bios_init.c | 1423 u32 sreg = nvbios_rd32(bios, init->offset + 1); local
1433 dreg, dmask, sreg, (shift & 0x80) ? "<<" : ">>",
1437 data = init_shift(init_rd32(init, sreg), shift);
2026 u32 sreg = nvbios_rd32(bios, init->offset + 1); local
2029 trace("COPY_ZM_REG\tR[0x%06x] = R[0x%06x]\n", dreg, sreg);
2032 init_wr32(init, dreg, init_rd32(init, sreg));
|
| /src/external/gpl3/binutils/dist/bfd/ |
| xtensa-isa.c | 305 xtensa_sysreg_internal *sreg = &isa->sysregs[n];
306 is_user = sreg->is_user;
308 if (sreg->number >= 0)
309 isa->sysreg_table[is_user][sreg->number] = n;
303 xtensa_sysreg_internal *sreg = &isa->sysregs[n]; local
|
| /src/external/gpl3/binutils.old/dist/bfd/ |
| xtensa-isa.c | 305 xtensa_sysreg_internal *sreg = &isa->sysregs[n];
306 is_user = sreg->is_user;
308 if (sreg->number >= 0)
309 isa->sysreg_table[is_user][sreg->number] = n;
303 xtensa_sysreg_internal *sreg = &isa->sysregs[n]; local
|
