| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/core/ |
| amdgpu_dc.c | 1498 union surface_update_flags *update_flags = &u->surface->update_flags;
1504 if (u->plane_info->color_space != u->surface->color_space) {
1509 if (u->plane_info->horizontal_mirror != u->surface->horizontal_mirror) {
1514 if (u->plane_info->rotation != u->surface->rotation) {
1519 if (u->plane_info->format != u->surface->format) {
1524 if (u->plane_info->stereo_format != u->surface->stereo_format) {
1529 if (u->plane_info->per_pixel_alpha != u->surface->per_pixel_alpha) {
1534 if (u->plane_info->global_alpha_value != u->surface->global_alpha_value) {
1539 if (u->plane_info->dcc.enable != u->surface->dcc.enable
1540 || u->plane_info->dcc.independent_64b_blks != u->surface->dcc.independent_64b_blk
2389 struct dc_plane_state *surface = srf_updates[i].surface; local in function:dc_commit_updates_for_stream
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/vmwgfx/ |
| vmwgfx_kms.c | 301 * vmw_du_vps_unpin_surf - unpins resource associated with a framebuffer surface
303 * @vps: plane state associated with the display surface
317 DRM_ERROR("Surface still pinned\n");
330 * Unpins the framebuffer surface
371 vps->surf = vmw_framebuffer_to_vfbs(fb)->surface;
492 struct vmw_surface *surface = NULL; local in function:vmw_du_cursor_plane_atomic_check
518 surface = vmw_framebuffer_to_vfbs(fb)->surface;
520 if (surface && !surface->snooper.image)
1380 struct vmw_surface *surface = NULL; local in function:vmw_kms_fb_create
[all...] |
| vmwgfx_ioctl.c | 260 struct vmw_surface *surface; local in function:vmw_present_ioctl
315 surface = vmw_res_to_srf(res);
317 vfb, surface, arg->sid,
322 vmw_surface_unreference(&surface);
|
| vmwgfx_kms.h | 53 * surface/buffer object validation, populate FIFO commands and command
72 * Some surface resource or buffer object need some extra cmd submission
73 * like update GB image for proxy surface and define a GMRFB for screen
87 * surface copy/DMA, etc.
99 * This is where to populate clips for surface copy/dma or blit commands
135 * struct vmw_du_update_plane_surface - closure structure for surface
141 /* This member is to handle special case SOU surface update */
237 struct vmw_surface *surface; member in struct:vmw_framebuffer_surface
240 bool is_bo_proxy; /* true if this is proxy surface for DMA buf */
281 * @surf Display surface for STD
[all...] |
| vmwgfx_stdu.c | 70 * @sid: Surface ID when copying between surface and screen targets.
112 * @display_srf: surface to be displayed. The dimension of this will always
208 * vmw_stdu_bind_st - Binds a surface to a Screen Target
214 * Binding a surface to a Screen Target the same as flipping
286 * surface change.
456 * Encodes a surface DMA command cliprect and updates the bounding box
573 * For the special case when we cannot create a proxy surface in a
624 /* We are updating the actual surface, not a proxy */
696 * VMs without 3D support don't have the surface DMA command an
[all...] |
| vmwgfx_scrn.c | 51 * blit surface to screen command.
59 * @sid: Surface id of surface to copy from.
378 * Unpins the display surface
605 blit->body.srcImage.sid = vfbs->surface->res.id;
692 * vmw_sou_plane_update_surface - Update display unit for surface backed fb.
1020 * blit surface to screen command.
1078 * vmw_sou_surface_clip - Callback to encode a blit surface to screen cliprect.
1109 * vmw_kms_sou_do_surface_dirty - Dirty part of a surface backed framebuffer
1112 * @framebuffer: Pointer to the surface-buffer backed framebuffer
[all...] |
| vmwgfx_drv.h | 529 * Context and surface management.
615 * Surface swapping. The "surface_lru" list is protected by the
616 * resource lock in order to be able to destroy a surface and take
1158 struct vmw_surface *surface,
1266 * Surface management - vmwgfx_surface.c
|
| vmwgfx_execbuf.c | 388 * vmw_view_res_val_add - Add a view and the surface it's pointing to to the
415 * vmw_view_id_val_add - Look up a view and add it and the surface it's pointing
1566 VMW_DEBUG_USER("could not find surface for DMA.\n");
2447 VMW_DEBUG_USER("Invalid surface id.\n");
2813 &cmd->body.surface.sid, NULL);
|
| /src/sys/external/bsd/drm2/dist/drm/radeon/ |
| radeon_asic.c | 241 .surface = {
309 .surface = {
405 .surface = {
473 .surface = {
541 .surface = {
609 .surface = {
677 .surface = {
745 .surface = {
813 .surface = {
881 .surface =
[all...] |
| radeon.h | 34 * - surface allocator & initializer : (bit like scratch reg) should
36 * related to surface
1985 } surface; member in struct:radeon_asic
2829 #define radeon_set_surface_reg(rdev, r, f, p, o, s) ((rdev)->asic->surface.set_reg((rdev), (r), (f), (p), (o), (s)))
2830 #define radeon_clear_surface_reg(rdev, r) ((rdev)->asic->surface.clear_reg((rdev), (r)))
|
| /src/sys/external/bsd/drm2/dist/drm/qxl/ |
| qxl_draw.c | 79 make_drawable(struct qxl_device *qdev, int surface, uint8_t type,
92 drawable->surface_id = surface; /* Only primary for now */
|
| /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/qcom/ |
| Makefile | 88 dtb-$(CONFIG_ARCH_QCOM) += sm8150-microsoft-surface-duo.dtb
|
| sm8150-microsoft-surface-duo.dts | 16 model = "Microsoft Surface Duo";
17 compatible = "microsoft,surface-duo", "qcom,sm8150";
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/ |
| dc.h | 173 /* Surface update type is used by dc_update_surfaces_and_stream
180 * ISR safe on windows. Currently fast update will only be used to flip surface
599 * Surface Interfaces
819 struct dc_plane_state *surface; member in struct:dc_surface_update
840 * Create a new surface with default parameters;
861 * This structure holds a surface address. There could be multiple addresses
878 * Structure to store surface/stream associations for validation
|
| /src/sys/external/bsd/drm2/dist/drm/vmwgfx/device_include/ |
| svga3d_cmd.h | 349 * A note on surface sizes: Sizes are always specified in pixels,
350 * even if the true surface size is not a multiple of the minimum
351 * block size of the surface's format. For example, a 3x3x1 DXT1
377 * A note on surface sizes: Sizes are always specified in pixels,
378 * even if the true surface size is not a multiple of the minimum
379 * block size of the surface's format. For example, a 3x3x1 DXT1
496 * Perform a surface copy within the same image.
502 SVGA3dSurfaceImageId surface; member in struct:__anon411ade0f1108
533 * If the discard flag is present in a surface DMA operation, the host may
535 * surface before applying the surface DMA contents
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/amd/display/amdgpu_dm/ |
| amdgpu_dm.c | 3243 /* TODO: set these based on surface format */
6055 /* avivo cursor are offset into the total surface */
6163 struct dc_plane_state *surface,
6185 if (surface) {
6188 surface,
6404 bundle->surface_updates[planes_count].surface = dc_plane;
6471 bundle->surface_updates[planes_count].surface = dc_plane;
6473 if (!bundle->surface_updates[planes_count].surface) {
6474 DRM_ERROR("No surface for CRTC: id=%d\n",
7058 dummy_updates[j].surface = status->plane_states[0]
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/i915/display/ |
| intel_display.c | 2594 * "The Color Control Surface (CCS) contains the compression status of
2597 * an area on the main surface of 16 x16 sets of 128 byte Y-tiled
2602 * lines on the main surface. Since each pixel is 4 bytes, this gives
2604 * main surface.
2619 * main surface. And each 64B CCS cache line represents an area of 4x1 Y-tiles
2620 * in the main surface. With 4 byte pixels and each Y-tile having dimensions of
2622 * the main surface.
2786 * The main surface pitch must be padded to a multiple of four
2933 * x/y offsets must match between CCS and the main surface.
3822 * AUX surface offset is specified as the distance from th
18623 u32 surface; member in struct:intel_display_error_state::intel_plane_error_state
[all...] |
