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    Searched refs:uartaddr (Results 1 - 16 of 16) sorted by relevancy

  /src/sys/arch/arm/rockchip/
rk_platform.c 140 volatile uint32_t *uartaddr = cpu_earlydevice_va_p() ? local
144 while ((le32toh(uartaddr[com_lsr]) & LSR_TXRDY) == 0)
147 uartaddr[com_data] = htole32(c);
218 volatile uint32_t *uartaddr = cpu_earlydevice_va_p() ? local
222 while ((le32toh(uartaddr[com_lsr]) & LSR_TXRDY) == 0)
225 uartaddr[com_data] = htole32(c);
276 volatile uint32_t *uartaddr = cpu_earlydevice_va_p() ? local
280 while ((le32toh(uartaddr[com_lsr]) & LSR_TXRDY) == 0)
283 uartaddr[com_data] = htole32(c);
335 volatile uint32_t *uartaddr = cpu_earlydevice_va_p() local
    [all...]
  /src/sys/arch/riscv/riscv/
mainbus.c 81 volatile uint8_t *uartaddr = cpu_earlydevice_va_p() ? local
85 while ((uartaddr[com_lsr] & LSR_TXRDY) == 0)
88 uartaddr[com_data] = c;
  /src/sys/arch/arm/fdt/
arm_platform.c 86 volatile uint32_t *uartaddr = cpu_earlydevice_va_p() ? local
90 while ((le32toh(uartaddr[PL01XCOM_FR / 4]) & PL01X_FR_TXFF) != 0)
93 uartaddr[PL01XCOM_DR / 4] = htole32(c);
96 while ((le32toh(uartaddr[PL01XCOM_FR / 4]) & PL01X_FR_TXFE) == 0)
  /src/sys/arch/arm/imx/
imx23_platform.c 70 volatile uint32_t *uartaddr = cpu_earlydevice_va_p() local
74 while ((le32toh(uartaddr[PL01XCOM_FR / 4]) & PL01X_FR_TXFF) != 0)
77 uartaddr[PL01XCOM_DR / 4] = htole32(c);
80 while ((le32toh(uartaddr[PL01XCOM_FR / 4]) & PL01X_FR_TXFE) == 0)
  /src/sys/arch/arm/vexpress/
vexpress_platform.c 100 volatile uint32_t *uartaddr = cpu_earlydevice_va_p() ? local
104 while ((le32toh(uartaddr[PL01XCOM_FR / 4]) & PL01X_FR_TXFF) != 0)
107 uartaddr[PL01XCOM_DR / 4] = htole32(c);
110 while ((le32toh(uartaddr[PL01XCOM_FR / 4]) & PL01X_FR_TXFE) == 0)
  /src/sys/arch/arm/altera/
cycv_platform.c 43 volatile uint32_t *uartaddr = cpu_earlydevice_va_p() ? local
47 while ((le32toh(uartaddr[com_lsr]) & LSR_TXRDY) == 0)
50 uartaddr[com_data] = htole32(c);
  /src/sys/arch/arm/nvidia/
tegra_platform.c 79 volatile uint32_t *uartaddr = cpu_earlydevice_va_p() ? local
83 while ((uartaddr[com_lsr] & LSR_TXRDY) == 0)
86 uartaddr[com_data] = c;
  /src/sys/arch/arm/ti/
am3_platform.c 32 volatile uint32_t *uartaddr = cpu_earlydevice_va_p() ? local
36 while ((le32toh(uartaddr[com_lsr]) & LSR_TXRDY) == 0)
39 uartaddr[com_data] = htole32(c);
omap3_platform.c 220 volatile uint32_t *uartaddr = cpu_earlydevice_va_p() ? local
224 while ((le32toh(uartaddr[com_lsr]) & LSR_TXRDY) == 0)
227 uartaddr[com_data] = htole32(c);
237 volatile uint32_t *uartaddr = cpu_earlydevice_va_p() ? local
241 while ((le32toh(uartaddr[com_lsr]) & LSR_TXRDY) == 0)
244 uartaddr[com_data] = htole32(c);
  /src/sys/arch/arm/xilinx/
zynq_platform.c 143 volatile uint32_t *uartaddr = cpu_earlydevice_va_p() ? local
148 uartaddr[UART_CONTROL / 4] = CR_TXEN;
149 while ((le32toh(uartaddr[UART_CHNL_INT_STS / 4]) & STS_TEMPTY) == 0)
152 uartaddr[UART_TX_RX_FIFO / 4] = htole32(c);
  /src/sys/arch/arm/nxp/
imx6_platform.c 121 volatile uint32_t *uartaddr = cpu_earlydevice_va_p() ? local
125 while ((le32toh(uartaddr[(IMX_USR2/4)]) & IMX_USR2_TXDC) == 0)
128 uartaddr[(IMX_UTXD/4)] = htole32(c);
  /src/sys/arch/evbarm/bcm53xx/
bcm53xx_machdep.c 440 volatile uint32_t *uartaddr = cpu_earlydevice_va_p() ? local
444 while ((le32toh(uartaddr[com_lsr]) & LSR_TXRDY) == 0)
447 uartaddr[com_data] = htole32(c);
  /src/sys/arch/arm/samsung/
exynos_platform.c 238 volatile uint32_t *uartaddr = cpu_earlydevice_va_p() ? local
242 while ((uartaddr[SSCOM_UFSTAT / 4] & UFSTAT_TXFULL) != 0)
245 uartaddr[SSCOM_UTXH / 4] = c;
  /src/sys/arch/arm/amlogic/
meson_platform.c 163 volatile uint32_t *uartaddr = cpu_earlydevice_va_p() ? local
168 while ((uartaddr[UART_STATUS_REG/4] & UART_STATUS_TX_EMPTY) == 0) {
173 uartaddr[UART_WFIFO_REG/4] = c;
175 while ((uartaddr[UART_STATUS_REG/4] & UART_STATUS_TX_EMPTY) == 0) {
  /src/sys/arch/arm/sunxi/
sunxi_platform.c 190 volatile uint32_t *uartaddr = cpu_earlydevice_va_p() ? local
194 while ((le32toh(uartaddr[com_lsr]) & LSR_TXRDY) == 0)
197 uartaddr[com_data] = htole32(c);
  /src/sys/arch/arm/broadcom/
bcm283x_platform.c 1350 volatile uint32_t *uartaddr = local
1355 while ((le32toh(uartaddr[PL01XCOM_FR / 4]) & PL01X_FR_TXFF) != 0)
1358 uartaddr[PL01XCOM_DR / 4] = htole32(c);
1360 while ((le32toh(uartaddr[PL01XCOM_FR / 4]) & PL01X_FR_TXFE) == 0)
1367 volatile uint32_t *uartaddr = local
1372 while ((le32toh(uartaddr[com_lsr]) & LSR_TXRDY) == 0)
1375 uartaddr[com_data] = htole32(c);

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