| /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
| amdgpu_display.h | 36 #define amdgpu_display_page_flip_get_scanoutpos(adev, crtc, vbl, pos) (adev)->mode_info.funcs->page_flip_get_scanoutpos((adev), (crtc), (vbl), (pos))
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| amdgpu_display.c | 815 u32 vbl = 0, position = 0; local in function:amdgpu_display_get_crtc_scanoutpos
827 if (amdgpu_display_page_flip_get_scanoutpos(adev, pipe, &vbl, &position) == 0)
841 if (vbl > 0) {
844 vbl_start = vbl & 0x1fff;
845 vbl_end = (vbl >> 16) & 0x1fff;
904 /* Correct for shifted end of vbl at vbl_end. */
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| amdgpu_dce_virtual.c | 71 u32 *vbl, u32 *position)
73 *vbl = 0;
|
| amdgpu_mode.h | 285 u32 *vbl, u32 *position);
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| amdgpu_dce_v10_0.c | 266 u32 *vbl, u32 *position)
271 *vbl = RREG32(mmCRTC_V_BLANK_START_END + crtc_offsets[crtc]);
|
| amdgpu_dce_v11_0.c | 284 u32 *vbl, u32 *position)
289 *vbl = RREG32(mmCRTC_V_BLANK_START_END + crtc_offsets[crtc]);
|
| amdgpu_dce_v6_0.c | 218 u32 *vbl, u32 *position)
222 *vbl = RREG32(mmCRTC_V_BLANK_START_END + crtc_offsets[crtc]);
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| amdgpu_dce_v8_0.c | 211 u32 *vbl, u32 *position)
216 *vbl = RREG32(mmCRTC_V_BLANK_START_END + crtc_offsets[crtc]);
|
| /src/sys/external/bsd/drm2/dist/include/drm/ |
| drm_vblank.h | 77 * @event.vbl:
84 struct drm_event_vblank vbl; member in union:drm_pending_vblank_event::__anon0f5ecb57010a
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| /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/subdev/fb/ |
| nouveau_nvkm_subdev_fb_ramnv40.c | 85 u32 vbl = nvkm_rd32(device, 0x600808 + (i * 0x2000)); local in function:nv40_ram_prog
88 if (vbl != nvkm_rd32(device, 0x600808 + (i * 0x2000))) {
|
| /src/sys/external/bsd/drm2/dist/drm/radeon/ |
| radeon_display.c | 1813 u32 stat_crtc = 0, vbl = 0, position = 0; local in function:radeon_get_crtc_scanoutpos
1827 vbl = RREG32(EVERGREEN_CRTC_V_BLANK_START_END +
1834 vbl = RREG32(EVERGREEN_CRTC_V_BLANK_START_END +
1841 vbl = RREG32(EVERGREEN_CRTC_V_BLANK_START_END +
1848 vbl = RREG32(EVERGREEN_CRTC_V_BLANK_START_END +
1855 vbl = RREG32(EVERGREEN_CRTC_V_BLANK_START_END +
1862 vbl = RREG32(EVERGREEN_CRTC_V_BLANK_START_END +
1870 vbl = RREG32(AVIVO_D1CRTC_V_BLANK_START_END);
1875 vbl = RREG32(AVIVO_D2CRTC_V_BLANK_START_END);
1885 vbl = (RREG32(RADEON_CRTC_V_TOTAL_DISP)
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/ |
| drm_vblank.c | 266 /* some kind of default for drivers w/o accurate vbl timestamping */
898 e->event.vbl.sequence = seq;
904 e->event.vbl.tv_sec = tv.tv_sec;
905 e->event.vbl.tv_usec = tv.tv_nsec / 1000;
1573 e->event.base.length = sizeof(e->event.vbl);
1574 e->event.vbl.user_data = vblwait->request.signal;
1575 e->event.vbl.crtc_id = 0;
1579 e->event.vbl.crtc_id = crtc->base.id;
|
| drm_plane.c | 1176 e->event.vbl.user_data = page_flip->user_data;
1177 e->event.vbl.crtc_id = crtc->base.id;
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| drm_atomic_uapi.c | 911 e->event.vbl.crtc_id = crtc->base.id;
912 e->event.vbl.user_data = user_data;
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| /src/sys/external/bsd/drm2/dist/drm/vmwgfx/ |
| vmwgfx_scrn.c | 768 &event->event.vbl.tv_sec,
769 &event->event.vbl.tv_usec,
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| vmwgfx_stdu.c | 1657 &event->event.vbl.tv_sec,
1658 &event->event.vbl.tv_usec,
|
| /src/sys/arch/amiga/amiga/ |
| locore.s | 432 * Level 3: VBL
1378 .asciz "vbl" | vertical blank
1388 .asciz "lclbus" | 3: local bus, e.g. Altais vbl
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| /src/sys/external/bsd/drm2/dist/drm/amd/display/amdgpu_dm/ |
| amdgpu_dm.c | 211 u32 *vbl, u32 *position)
239 *vbl = v_blank_start | (v_blank_end << 16);
|
