| /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/ |
| amdgpu_smu8_hwmgr.c | 111 hwmgr->dyn_state.vddc_dependency_on_sclk;
267 hwmgr->dyn_state.vddc_dependency_on_sclk;
449 hwmgr->dyn_state.vddc_dependency_on_sclk;
563 hwmgr->dyn_state.vddc_dependency_on_sclk;
692 hwmgr->dyn_state.vddc_dependency_on_sclk;
1152 hwmgr->dyn_state.vddc_dependency_on_sclk;
1351 hwmgr->dyn_state.vddc_dependency_on_sclk;
1524 hwmgr->dyn_state.vddc_dependency_on_sclk;
1622 table = hwmgr->dyn_state.vddc_dependency_on_sclk;
1641 hwmgr->dyn_state.vddc_dependency_on_sclk;
[all...] |
| amdgpu_processpptables.c | 1218 hwmgr->dyn_state.vddc_dependency_on_sclk = NULL;
1314 &hwmgr->dyn_state.vddc_dependency_on_sclk, table);
1346 if(result == 0 && (NULL != hwmgr->dyn_state.vddc_dependency_on_sclk) &&
1347 (0 != hwmgr->dyn_state.vddc_dependency_on_sclk->count))
1350 hwmgr->dyn_state.vddc_dependency_on_sclk);
1655 kfree(hwmgr->dyn_state.vddc_dependency_on_sclk);
1656 hwmgr->dyn_state.vddc_dependency_on_sclk = NULL;
|
| amdgpu_ppatomctrl.c | 1135 for (entry_id = 0; entry_id < hwmgr->dyn_state.vddc_dependency_on_sclk->count; entry_id++) {
1136 if (hwmgr->dyn_state.vddc_dependency_on_sclk->entries[entry_id].v == virtual_voltage_id) {
1142 if (entry_id >= hwmgr->dyn_state.vddc_dependency_on_sclk->count) {
1143 pr_debug("Can't find requested voltage id in vddc_dependency_on_sclk table!\n");
1151 cpu_to_le32(hwmgr->dyn_state.vddc_dependency_on_sclk->entries[entry_id].clk);
|
| amdgpu_smu7_hwmgr.c | 681 hwmgr->dyn_state.vddc_dependency_on_sclk;
2409 tmp = smu7_patch_vddc(hwmgr, hwmgr->dyn_state.vddc_dependency_on_sclk);
2465 struct phm_clock_voltage_dependency_table *allowed_sclk_vddc_table = hwmgr->dyn_state.vddc_dependency_on_sclk;
2762 for (count = hwmgr->dyn_state.vddc_dependency_on_sclk->count-1;
2764 if (tmp_sclk >= hwmgr->dyn_state.vddc_dependency_on_sclk->entries[count].clk) {
2765 tmp_sclk = hwmgr->dyn_state.vddc_dependency_on_sclk->entries[count].clk;
2772 tmp_sclk = hwmgr->dyn_state.vddc_dependency_on_sclk->entries[0].clk;
2776 *sclk_mask = hwmgr->dyn_state.vddc_dependency_on_sclk->count-1;
4676 sclk_table = hwmgr->dyn_state.vddc_dependency_on_sclk;
|
| /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/smumgr/ |
| amdgpu_iceland_smumgr.c | 405 PP_ASSERT_WITH_CODE(hwmgr->dyn_state.cac_leakage_table->count == hwmgr->dyn_state.vddc_dependency_on_sclk->count,
545 PP_ASSERT_WITH_CODE(NULL != hwmgr->dyn_state.vddc_dependency_on_sclk,
559 for (v_index = 0; (uint32_t)v_index < hwmgr->dyn_state.vddc_dependency_on_sclk->count; v_index++) {
560 if (tab->value == hwmgr->dyn_state.vddc_dependency_on_sclk->entries[v_index].v) {
579 for (v_index = 0; (uint32_t)v_index < hwmgr->dyn_state.vddc_dependency_on_sclk->count; v_index++) {
580 if (tab->value <= hwmgr->dyn_state.vddc_dependency_on_sclk->entries[v_index].v) {
739 if (ulv_voltage > hwmgr->dyn_state.vddc_dependency_on_sclk->entries[0].v)
743 state->VddcOffset = (uint16_t)(hwmgr->dyn_state.vddc_dependency_on_sclk->entries[0].v - ulv_voltage);
746 if (ulv_voltage > hwmgr->dyn_state.vddc_dependency_on_sclk->entries[0].v)
750 (hwmgr->dyn_state.vddc_dependency_on_sclk->entries[0].v - ulv_voltage
[all...] |
| amdgpu_ci_smumgr.c | 422 hwmgr->dyn_state.vddc_dependency_on_sclk, clock,
592 PP_ASSERT_WITH_CODE(hwmgr->dyn_state.cac_leakage_table->count == hwmgr->dyn_state.vddc_dependency_on_sclk->count,
776 PP_ASSERT_WITH_CODE(NULL != hwmgr->dyn_state.vddc_dependency_on_sclk,
785 for (v_index = 0; (uint32_t)v_index < hwmgr->dyn_state.vddc_dependency_on_sclk->count; v_index++) {
786 if (tab->value == hwmgr->dyn_state.vddc_dependency_on_sclk->entries[v_index].v) {
801 for (v_index = 0; (uint32_t)v_index < hwmgr->dyn_state.vddc_dependency_on_sclk->count; v_index++) {
802 if (tab->value <= hwmgr->dyn_state.vddc_dependency_on_sclk->entries[v_index].v) {
970 if (ulv_voltage > hwmgr->dyn_state.vddc_dependency_on_sclk->entries[0].v)
974 state->VddcOffset = (uint16_t)(hwmgr->dyn_state.vddc_dependency_on_sclk->entries[0].v - ulv_voltage);
977 if (ulv_voltage > hwmgr->dyn_state.vddc_dependency_on_sclk->entries[0].v
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/radeon/ |
| radeon_r600_dpm.c | 931 ret = r600_parse_clk_voltage_dep_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk,
943 kfree(rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries);
954 kfree(rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries);
966 kfree(rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries);
1307 kfree(dyn_state->vddc_dependency_on_sclk.entries);
|
| radeon_ci_dpm.c | 292 rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count)
2343 if (rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries == NULL)
2347 for (v_index = 0; (u32)v_index < rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count; v_index++) {
2349 rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[v_index].v) {
2364 for (v_index = 0; (u32)v_index < rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count; v_index++) {
2366 rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[v_index].v) {
2599 for (level = 0; level < rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count; level++) {
2600 if (rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[level].clk >=
3143 if (ulv_voltage > rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[0].v)
3147 rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[0].v - ulv_voltage
[all...] |
| radeon_kv_dpm.c | 562 &rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk;
584 &rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk;
725 &rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk;
1086 &rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk;
1720 &rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk;
2115 &rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk;
2156 &rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk;
2360 &rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk;
|
| radeon_si_dpm.c | 3053 btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk,
3159 btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk,
4161 if (rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries == NULL)
4164 for (v_index = 0; (u32)v_index < rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count; v_index++) {
4166 (u16)rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[v_index].v) {
4179 for (v_index = 0; (u32)v_index < rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count; v_index++) {
4181 (u16)rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[v_index].v) {
5909 &rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk);
|
| radeon_btc_dpm.c | 2214 btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk,
2223 btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk,
2232 btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk,
|
| radeon_atombios.c | 3311 u32 count = rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count;
3315 if (rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[entry_id].v ==
3327 cpu_to_le32(rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[entry_id].clk);
|
| radeon_ni_dpm.c | 879 btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk,
1018 &rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk);
|
| radeon.h | 1517 struct radeon_clock_voltage_dependency_table vddc_dependency_on_sclk; member in struct:radeon_dpm_dynamic_state
|
| /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
| amdgpu_dpm.h | 210 struct amdgpu_clock_voltage_dependency_table vddc_dependency_on_sclk; member in struct:amdgpu_dpm_dynamic_state
|
| amdgpu_kv_dpm.c | 81 &adev->pm.dpm.dyn_state.vddc_dependency_on_sclk;
103 &adev->pm.dpm.dyn_state.vddc_dependency_on_sclk;
808 &adev->pm.dpm.dyn_state.vddc_dependency_on_sclk;
1169 &adev->pm.dpm.dyn_state.vddc_dependency_on_sclk;
1784 &adev->pm.dpm.dyn_state.vddc_dependency_on_sclk;
2180 &adev->pm.dpm.dyn_state.vddc_dependency_on_sclk;
2221 &adev->pm.dpm.dyn_state.vddc_dependency_on_sclk;
2425 &adev->pm.dpm.dyn_state.vddc_dependency_on_sclk;
|
| amdgpu_dpm.c | 339 ret = amdgpu_parse_clk_voltage_dep_table(&adev->pm.dpm.dyn_state.vddc_dependency_on_sclk,
728 kfree(dyn_state->vddc_dependency_on_sclk.entries);
|
| amdgpu_atombios.c | 1368 u32 count = adev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count;
1372 if (adev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[entry_id].v ==
1384 cpu_to_le32(adev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[entry_id].clk);
|
| amdgpu_si_dpm.c | 3513 btc_get_max_clock_from_voltage_dependency_table(&adev->pm.dpm.dyn_state.vddc_dependency_on_sclk,
3619 btc_apply_voltage_dependency_rules(&adev->pm.dpm.dyn_state.vddc_dependency_on_sclk,
4625 if (adev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries == NULL)
4628 for (v_index = 0; (u32)v_index < adev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count; v_index++) {
4630 (u16)adev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[v_index].v) {
4643 for (v_index = 0; (u32)v_index < adev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count; v_index++) {
4645 (u16)adev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[v_index].v) {
6363 &adev->pm.dpm.dyn_state.vddc_dependency_on_sclk);
|
| /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/inc/ |
| hwmgr.h | 627 struct phm_clock_voltage_dependency_table *vddc_dependency_on_sclk; member in struct:phm_dynamic_state_info
|
