/src/sys/external/bsd/drm2/dist/drm/nouveau/include/nvif/ |
cl0046.h | 25 __u16 vline; member in struct:nv04_disp_scanoutpos_v0
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cl5070.h | 24 __u16 vline; member in struct:nv50_disp_scanoutpos_v0
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/src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/engine/disp/ |
nouveau_nvkm_engine_disp_headnv04.c | 46 nv04_head_rgpos(struct nvkm_head *head, u16 *hline, u16 *vline) 51 *vline = (data & 0x0000ffff);
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nouveau_nvkm_engine_disp_headgv100.c | 44 gv100_head_rgpos(struct nvkm_head *head, u16 *hline, u16 *vline) 48 /* vline read locks hline. */ 49 *vline = nvkm_rd32(device, 0x616330 + hoff) & 0x0000ffff;
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nouveau_nvkm_engine_disp_headnv50.c | 53 nv50_head_rgpos(struct nvkm_head *head, u16 *hline, u16 *vline) 57 /* vline read locks hline. */ 58 *vline = nvkm_rd32(device, 0x616340 + hoff) & 0x0000ffff;
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head.h | 41 void (*rgpos)(struct nvkm_head *, u16 *hline, u16 *vline);
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nouveau_nvkm_engine_disp_head.c | 77 head->func->rgpos(head, &args->v0.hline, &args->v0.vline);
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/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/inc/ |
hw_sequencer.h | 101 enum vline_select vline);
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/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/ |
dcn10_hw_sequencer.h | 166 enum vline_select vline);
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amdgpu_dcn10_hw_sequencer.c | 3168 enum vline_select vline, 3174 if (vline == VLINE0) 3176 else if (vline == VLINE1) 3199 enum vline_select vline) 3203 if (vline == VLINE0) { 3207 dcn10_cal_vline_position(dc, pipe_ctx, vline, &start_line, &end_line); 3211 } else if (vline == VLINE1) {
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/src/lib/libcurses/ |
line.c | 115 * vline -- 119 vline(chtype ch, int count) function in typeref:typename:int
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Makefile | 182 curses_screen.3 use_env.3 curses_line.3 vline.3 \
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curses.h | 773 int vline(chtype, int);
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/src/sys/external/bsd/drm2/dist/drm/nouveau/ |
nouveau_display.c | 131 if (args.scan.vline) { 141 args.scan.vtotal, args.scan.vline);
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/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
amdgpu_dce_v10_0.c | 92 uint32_t vline; member in struct:__anon55e5877b0108 98 .vline = DISP_INTERRUPT_STATUS__LB_D1_VLINE_INTERRUPT_MASK, 103 .vline = DISP_INTERRUPT_STATUS_CONTINUE__LB_D2_VLINE_INTERRUPT_MASK, 108 .vline = DISP_INTERRUPT_STATUS_CONTINUE2__LB_D3_VLINE_INTERRUPT_MASK, 113 .vline = DISP_INTERRUPT_STATUS_CONTINUE3__LB_D4_VLINE_INTERRUPT_MASK, 118 .vline = DISP_INTERRUPT_STATUS_CONTINUE4__LB_D5_VLINE_INTERRUPT_MASK, 123 .vline = DISP_INTERRUPT_STATUS_CONTINUE5__LB_D6_VLINE_INTERRUPT_MASK, 3253 case 1: /* vline */ 3254 if (disp_int & interrupt_status_offsets[crtc].vline) 3259 DRM_DEBUG("IH: D%d vline\n", crtc + 1) [all...] |
amdgpu_dce_v11_0.c | 94 uint32_t vline; member in struct:__anon55f79ffc0108 100 .vline = DISP_INTERRUPT_STATUS__LB_D1_VLINE_INTERRUPT_MASK, 105 .vline = DISP_INTERRUPT_STATUS_CONTINUE__LB_D2_VLINE_INTERRUPT_MASK, 110 .vline = DISP_INTERRUPT_STATUS_CONTINUE2__LB_D3_VLINE_INTERRUPT_MASK, 115 .vline = DISP_INTERRUPT_STATUS_CONTINUE3__LB_D4_VLINE_INTERRUPT_MASK, 120 .vline = DISP_INTERRUPT_STATUS_CONTINUE4__LB_D5_VLINE_INTERRUPT_MASK, 125 .vline = DISP_INTERRUPT_STATUS_CONTINUE5__LB_D6_VLINE_INTERRUPT_MASK, 3380 case 1: /* vline */ 3381 if (disp_int & interrupt_status_offsets[crtc].vline) 3386 DRM_DEBUG("IH: D%d vline\n", crtc + 1) [all...] |
amdgpu_dce_v6_0.c | 95 uint32_t vline; member in struct:__anonadb87c700108 101 .vline = DISP_INTERRUPT_STATUS__LB_D1_VLINE_INTERRUPT_MASK, 106 .vline = DISP_INTERRUPT_STATUS_CONTINUE__LB_D2_VLINE_INTERRUPT_MASK, 111 .vline = DISP_INTERRUPT_STATUS_CONTINUE2__LB_D3_VLINE_INTERRUPT_MASK, 116 .vline = DISP_INTERRUPT_STATUS_CONTINUE3__LB_D4_VLINE_INTERRUPT_MASK, 121 .vline = DISP_INTERRUPT_STATUS_CONTINUE4__LB_D5_VLINE_INTERRUPT_MASK, 126 .vline = DISP_INTERRUPT_STATUS_CONTINUE5__LB_D6_VLINE_INTERRUPT_MASK, 2974 case 1: /* vline */ 2975 if (disp_int & interrupt_status_offsets[crtc].vline) 2980 DRM_DEBUG("IH: D%d vline\n", crtc + 1) [all...] |
amdgpu_dce_v8_0.c | 92 uint32_t vline; member in struct:__anonaddcad720108 98 .vline = DISP_INTERRUPT_STATUS__LB_D1_VLINE_INTERRUPT_MASK, 103 .vline = DISP_INTERRUPT_STATUS_CONTINUE__LB_D2_VLINE_INTERRUPT_MASK, 108 .vline = DISP_INTERRUPT_STATUS_CONTINUE2__LB_D3_VLINE_INTERRUPT_MASK, 113 .vline = DISP_INTERRUPT_STATUS_CONTINUE3__LB_D4_VLINE_INTERRUPT_MASK, 118 .vline = DISP_INTERRUPT_STATUS_CONTINUE4__LB_D5_VLINE_INTERRUPT_MASK, 123 .vline = DISP_INTERRUPT_STATUS_CONTINUE5__LB_D6_VLINE_INTERRUPT_MASK, 3064 case 1: /* vline */ 3065 if (disp_int & interrupt_status_offsets[crtc].vline) 3070 DRM_DEBUG("IH: D%d vline\n", crtc + 1) [all...] |
/src/tests/lib/libcurses/slave/ |
curses_commands.c | 2738 report_return(vline(ch, count));
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