| /src/sys/external/bsd/drm2/dist/drm/i915/display/ |
| intel_cdclk.c | 488 cdclk_state->voltage_level = (val & DSPFREQGUAR_MASK) >>
491 cdclk_state->voltage_level = (val & DSPFREQGUAR_MASK_CHV) >>
536 u32 val, cmd = cdclk_state->voltage_level;
623 u32 val, cmd = cdclk_state->voltage_level;
715 cdclk_state->voltage_level =
786 cdclk_state->voltage_level);
925 cdclk_state->voltage_level =
1083 cdclk_state->voltage_level);
1154 cdclk_state.voltage_level = skl_calc_voltage_level(cdclk_state.cdclk);
1165 cdclk_state.voltage_level = skl_calc_voltage_level(cdclk_state.cdclk)
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/calcs/ |
| amdgpu_dcn_calcs.c | 487 input.clks_cfg.voltage = v->voltage_level;
549 if (v->voltage_level < 2) {
579 if (v->voltage_level < 3) {
603 v->fabric_and_dram_bandwidth = v->fabric_and_dram_bandwidth_per_state[v->voltage_level];
607 v->dcfclk = v->dcfclk_per_state[v->voltage_level];
618 if (v->voltage_level >= 2) {
622 if (v->voltage_level >= 3)
1036 if (v->voltage_level != 0
1043 if (v->voltage_level == 0 &&
1096 if (v->voltage_level != number_of_states_plus_one && !fast_validate)
[all...] |
| amdgpu_dcn_calc_auto.c | 1005 v->voltage_level = v->voltage_level_without_immediate_flip;
1009 v->voltage_level = v->voltage_level_with_immediate_flip;
1011 v->dcfclk = v->dcfclk_per_state[v->voltage_level];
1012 v->fabric_and_dram_bandwidth = v->fabric_and_dram_bandwidth_per_state[v->voltage_level];
1014 v->required_dispclk_per_ratio[j] = v->required_dispclk[v->voltage_level][j];
1016 v->dpp_per_plane_per_ratio[j][k] = v->no_of_dpp[v->voltage_level][j][k];
1018 v->dispclk_dppclk_support_per_ratio[j] = v->dispclk_dppclk_support[v->voltage_level][j];
1020 v->max_phyclk = v->phyclk_per_state[v->voltage_level];
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/inc/ |
| dcn_calcs.h | 213 int voltage_level; member in struct:dcn_bw_internal_vars
|
| /src/sys/external/bsd/drm2/dist/drm/radeon/ |
| radeon_atombios.c | 3102 void radeon_atom_set_voltage(struct radeon_device *rdev, u16 voltage_level, u8 voltage_type)
3106 u8 frev, crev, volt_index = voltage_level;
3112 if (voltage_level == 0xff01)
3124 args.v2.usVoltageLevel = cpu_to_le16(voltage_level);
3129 args.v3.usVoltageLevel = cpu_to_le16(voltage_level);
3337 u16 voltage_level, u8 voltage_type,
3353 args.v2.usVoltageLevel = cpu_to_le16(voltage_level);
3361 args.v2.usVoltageLevel = cpu_to_le16(voltage_level);
|
| radeon.h | 315 void radeon_atom_set_voltage(struct radeon_device *rdev, u16 voltage_level, u8 voltage_type);
317 u16 voltage_level, u8 voltage_type,
|
| radeon_ci_dpm.c | 3000 SMU7_Discrete_VoltageLevel voltage_level; local in function:ci_populate_smc_acpi_level
3067 if (ci_populate_mvdd_value(rdev, 0, &voltage_level))
3071 cpu_to_be32(voltage_level.Voltage * VOLTAGE_SCALE);
|
| /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/smumgr/ |
| amdgpu_iceland_smumgr.c | 1435 SMU71_Discrete_VoltageLevel voltage_level; local in function:iceland_populate_smc_acpi_level
1509 if (0 == iceland_populate_mvdd_value(hwmgr, 0, &voltage_level))
1511 PP_HOST_TO_SMC_UL(voltage_level.Voltage * VOLTAGE_SCALE);
|
| amdgpu_ci_smumgr.c | 1387 SMU7_Discrete_VoltageLevel voltage_level; local in function:ci_populate_smc_acpi_level
1461 if (0 == ci_populate_mvdd_value(hwmgr, 0, &voltage_level))
1463 PP_HOST_TO_SMC_UL(voltage_level.Voltage * VOLTAGE_SCALE);
|
| amdgpu_tonga_smumgr.c | 1187 SMIO_Pattern voltage_level; local in function:tonga_populate_smc_acpi_level
1251 if (0 == tonga_populate_mvdd_value(hwmgr, 0, &voltage_level))
1253 PP_HOST_TO_SMC_UL(voltage_level.Voltage * VOLTAGE_SCALE);
|
| /src/sys/external/bsd/drm2/dist/drm/i915/ |
| i915_drv.h | 896 u8 voltage_level; member in struct:intel_cdclk_state
|
