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    Searched refs:voltage_table (Results 1 - 18 of 18) sorted by relevancy

  /src/sys/dev/fdt/
pwmregulator.c 144 struct voltage_duty *voltage_table = kmem_zalloc(len, KM_SLEEP); local
146 (uint32_t *)voltage_table, len / sizeof(uint32_t)) == 0) {
147 sc->sc_voltage_table = voltage_table;
154 voltage_table[i].voltage,
155 voltage_table[i].duty);
  /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/
amdgpu_ppatomfwctrl.c 102 struct pp_atomfwctrl_voltage_table *voltage_table)
121 voltage_table->count = 0;
132 voltage_table->entries[i].value =
135 voltage_table->entries[i].smio_low =
139 voltage_table->count =
141 voltage_table->mask_low =
144 voltage_table->phase_delay =
148 voltage_table->psi1_enable =
150 voltage_table->psi0_enable =
152 voltage_table->max_vid_step
    [all...]
amdgpu_smu_helper.c 413 uint8_t phm_get_voltage_id(pp_atomctrl_voltage_table *voltage_table,
416 uint8_t count = (uint8_t) (voltage_table->count);
419 PP_ASSERT_WITH_CODE((NULL != voltage_table),
426 if (voltage_table->entries[i].value >= voltage)
ppatomfwctrl.h 228 uint8_t voltage_mode, struct pp_atomfwctrl_voltage_table *voltage_table);
amdgpu_ppatomctrl.c 534 pp_atomctrl_voltage_table *voltage_table)
558 voltage_table->entries[i].value =
560 voltage_table->entries[i].smio_low =
564 voltage_table->mask_low =
566 voltage_table->count =
568 voltage_table->phase_delay =
ppatomctrl.h 305 extern int atomctrl_get_voltage_table_v3(struct pp_hwmgr *hwmgr, uint8_t voltage_type, uint8_t voltage_mode, pp_atomctrl_voltage_table *voltage_table);
smu_helper.h 85 extern uint8_t phm_get_voltage_id(struct pp_atomctrl_voltage_table *voltage_table,
amdgpu_smu7_hwmgr.c 230 static int phm_get_svi2_voltage_table_v0(pp_atomctrl_voltage_table *voltage_table,
236 PP_ASSERT_WITH_CODE((NULL != voltage_table),
239 voltage_table->mask_low = 0;
240 voltage_table->phase_delay = 0;
241 voltage_table->count = voltage_dependency_table->count;
244 voltage_table->entries[i].value =
246 voltage_table->entries[i].smio_low = 0;
amdgpu_vega10_hwmgr.c 2510 struct pp_atomfwctrl_voltage_table voltage_table; local
2533 VOLTAGE_OBJ_SVID2, &voltage_table);
2534 pp_table->MaxVidStep = voltage_table.max_vid_step;
2552 data->vddc_voltage_table.psi0_enable = voltage_table.psi0_enable;
2553 data->vddc_voltage_table.psi1_enable = voltage_table.psi1_enable;
  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_atombios.h 191 struct atom_voltage_table *voltage_table);
amdgpu_atombios.c 1505 struct atom_voltage_table *voltage_table)
1534 voltage_table->entries[i].value =
1536 voltage_table->entries[i].smio_low =
1541 voltage_table->mask_low = le32_to_cpu(gpio->ulGpioMaskVal);
1542 voltage_table->count = gpio->ucGpioEntryNum;
1543 voltage_table->phase_delay = gpio->ucPhaseDelay;
amdgpu_si_dpm.c 4389 struct atom_voltage_table *voltage_table)
4393 if (voltage_table->count <= max_voltage_steps)
4396 diff = voltage_table->count - max_voltage_steps;
4399 voltage_table->entries[i] = voltage_table->entries[i + diff];
4401 voltage_table->count = max_voltage_steps;
4406 struct atom_voltage_table *voltage_table)
4413 voltage_table->mask_low = 0;
4414 voltage_table->phase_delay = 0;
4416 voltage_table->count = voltage_dependency_table->count
    [all...]
  /src/sys/external/bsd/drm2/dist/drm/radeon/
radeon_cypress_dpm.c 1474 struct atom_voltage_table *voltage_table)
1478 if (voltage_table->count <= MAX_NO_VREG_STEPS)
1481 diff = voltage_table->count - MAX_NO_VREG_STEPS;
1484 voltage_table->entries[i] = voltage_table->entries[i + diff];
1486 voltage_table->count = MAX_NO_VREG_STEPS;
1518 struct atom_voltage_table *voltage_table,
1523 for (i = 0; i < voltage_table->count; i++) {
1525 table->lowSMIO[i] |= cpu_to_be32(voltage_table->entries[i].smio_low);
radeon_ci_dpm.c 178 struct atom_voltage_table *voltage_table);
186 struct atom_voltage_table_entry *voltage_table,
2121 struct atom_voltage_table *voltage_table)
2128 voltage_table->mask_low = 0;
2129 voltage_table->phase_delay = 0;
2131 voltage_table->count = voltage_dependency_table->count;
2132 for (i = 0; i < voltage_table->count; i++) {
2133 voltage_table->entries[i].value = voltage_dependency_table->entries[i].v;
2134 voltage_table->entries[i].smio_low = 0;
2203 struct atom_voltage_table_entry *voltage_table,
    [all...]
radeon_atombios.c 3719 struct atom_voltage_table *voltage_table)
3751 voltage_table->entries[i].value =
3754 voltage_table->entries[i].value,
3756 &voltage_table->entries[i].smio_low,
3757 &voltage_table->mask_low);
3763 voltage_table->count = formula->ucNumOfVoltageEntries;
3786 voltage_table->entries[i].value =
3788 voltage_table->entries[i].smio_low =
3793 voltage_table->mask_low = le32_to_cpu(gpio->ulGpioMaskVal);
3794 voltage_table->count = gpio->ucGpioEntryNum
    [all...]
radeon_si_dpm.c 3925 struct atom_voltage_table *voltage_table)
3929 if (voltage_table->count <= max_voltage_steps)
3932 diff = voltage_table->count - max_voltage_steps;
3935 voltage_table->entries[i] = voltage_table->entries[i + diff];
3937 voltage_table->count = max_voltage_steps;
3942 struct atom_voltage_table *voltage_table)
3949 voltage_table->mask_low = 0;
3950 voltage_table->phase_delay = 0;
3952 voltage_table->count = voltage_dependency_table->count
    [all...]
radeon_ni_dpm.c 1264 struct atom_voltage_table *voltage_table,
1269 for (i = 0; i < voltage_table->count; i++) {
1271 table->lowSMIO[i] |= cpu_to_be32(voltage_table->entries[i].smio_low);
radeon.h 347 struct atom_voltage_table *voltage_table);

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