| /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
| amdgpu_ih.h | 53 uint64_t wptr_addr; member in struct:amdgpu_ih_ring
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| amdgpu_mes.h | 67 uint64_t wptr_addr; member in struct:mes_add_queue_input
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| amdgpu_ih.c | 109 ih->wptr_addr = dma_addr + ih->ring_size;
136 ih->wptr_addr = adev->wb.gpu_addr + wptr_offs * 4;
177 amdgpu_device_wb_free(adev, (ih->wptr_addr - ih->gpu_addr) / 4);
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| amdgpu_cik_ih.c | 141 WREG32(mmIH_RB_WPTR_ADDR_LO, lower_32_bits(ih->wptr_addr));
142 WREG32(mmIH_RB_WPTR_ADDR_HI, upper_32_bits(ih->wptr_addr) & 0xFF);
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| amdgpu_si_ih.c | 87 WREG32(IH_RB_WPTR_ADDR_LO, lower_32_bits(ih->wptr_addr));
88 WREG32(IH_RB_WPTR_ADDR_HI, upper_32_bits(ih->wptr_addr) & 0xFF);
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| amdgpu_cz_ih.c | 143 WREG32(mmIH_RB_WPTR_ADDR_LO, lower_32_bits(ih->wptr_addr));
144 WREG32(mmIH_RB_WPTR_ADDR_HI, upper_32_bits(ih->wptr_addr) & 0xFF);
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| amdgpu_iceland_ih.c | 143 WREG32(mmIH_RB_WPTR_ADDR_LO, lower_32_bits(ih->wptr_addr));
144 WREG32(mmIH_RB_WPTR_ADDR_HI, upper_32_bits(ih->wptr_addr) & 0xFF);
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| amdgpu_tonga_ih.c | 143 WREG32(mmIH_RB_WPTR_ADDR_LO, lower_32_bits(ih->wptr_addr));
144 WREG32(mmIH_RB_WPTR_ADDR_HI, upper_32_bits(ih->wptr_addr) & 0xFF);
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| amdgpu_navi10_ih.c | 148 lower_32_bits(ih->wptr_addr));
150 upper_32_bits(ih->wptr_addr) & 0xFFFF);
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| amdgpu_vega10_ih.c | 270 lower_32_bits(ih->wptr_addr));
272 upper_32_bits(ih->wptr_addr) & 0xFFFF);
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| amdgpu_gfx_v10_0.c | 286 uint64_t wptr_addr = adev->wb.gpu_addr + (ring->wptr_offs * 4); local in function:gfx10_kiq_map_queues
304 amdgpu_ring_write(kiq_ring, lower_32_bits(wptr_addr));
305 amdgpu_ring_write(kiq_ring, upper_32_bits(wptr_addr));
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| amdgpu_gfx_v8_0.c | 4388 uint64_t wptr_addr = adev->wb.gpu_addr + (ring->wptr_offs * 4); local in function:gfx_v8_0_kiq_kcq_enable
4402 amdgpu_ring_write(kiq_ring, lower_32_bits(wptr_addr));
4403 amdgpu_ring_write(kiq_ring, upper_32_bits(wptr_addr));
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| amdgpu_gfx_v9_0.c | 775 uint64_t wptr_addr = adev->wb.gpu_addr + (ring->wptr_offs * 4); local in function:gfx_v9_0_kiq_map_queues
797 amdgpu_ring_write(kiq_ring, lower_32_bits(wptr_addr));
798 amdgpu_ring_write(kiq_ring, upper_32_bits(wptr_addr));
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