| /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/engine/vp/ |
| nouveau_nvkm_engine_vp_g84.c | 35 .fifo_val = 0x111,
|
| /src/external/bsd/jemalloc/dist/test/analyze/ |
| prof_bias.c | 29 vec[0] = (void *)0x111;
|
| /src/external/gpl3/gdb/dist/sim/testsuite/h8300/ |
| addw.s | 49 add.w #0x111, r0 ; Immediate 16-bit operand
68 mov.w #0x111, r1
|
| subw.s | 40 sub.w #0x111, r0 ; Immediate 16-bit operand
59 mov.w #0x111, r1
|
| /src/external/gpl3/gdb.old/dist/sim/testsuite/h8300/ |
| addw.s | 49 add.w #0x111, r0 ; Immediate 16-bit operand
68 mov.w #0x111, r1
|
| subw.s | 40 sub.w #0x111, r0 ; Immediate 16-bit operand
59 mov.w #0x111, r1
|
| /src/sys/arch/powerpc/include/ |
| spr.h | 137 #define SPR_SPRG1 0x111 /* E468 SPR General 1 */
|
| /src/tests/lib/libcurses/tests/ |
| std_defines | 54 assign KEY_F9 0x111
|
| /src/sys/arch/hpcmips/dev/ |
| ite8181reg.h | 92 #define ITE8181_GUI_CC0R1 0x111
|
| /src/external/bsd/ppp/dist/pppd/plugins/pppoe/ |
| pppoe.h | 132 #define TAG_HURL 0x111
|
| /src/external/gpl3/binutils/dist/gprofng/src/ |
| hwc_arm64_amcc.h | 49 { I("l1_stage2_tlb_refill", 0x111, STXT("L1 stage 2 TLB refill")) },
|
| hwc_arm_ampere_1.h | 118 { I("bpu_conditional_branch_hit_btb", 0x111,
|
| /src/external/gpl3/binutils.old/dist/gprofng/src/ |
| hwc_arm64_amcc.h | 49 { I("l1_stage2_tlb_refill", 0x111, STXT("L1 stage 2 TLB refill")) },
|
| hwc_arm_ampere_1.h | 118 { I("bpu_conditional_branch_hit_btb", 0x111,
|
| /src/lib/libform/ |
| form.h | 101 #define REQ_NEXT_CHAR (KEY_MAX + 0x111) /* move to the next char
|
| /src/sys/arch/powerpc/include/ibm4xx/ |
| dcr4xx.h | 113 #define DCR_DMA0_CT2 0x111 /* DMA Count Register 2 */
|
| /src/external/apache2/llvm/dist/llvm/lib/ExecutionEngine/RuntimeDyld/Targets/ |
| RuntimeDyldCOFFAArch64.h | 31 INTERNAL_REL_ARM64_LONG_BRANCH26 = 0x111,
|
| /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/inc/ |
| fiji_ppsmc.h | 196 #define PPSMC_MSG_DPM_Enable_VCE_HS ((uint16_t) 0x111)
|
| smu7_ppsmc.h | 193 #define PPSMC_MSG_DPM_Enable_VCE_HS ((uint16_t) 0x111)
|
| tonga_ppsmc.h | 217 #define PPSMC_MSG_DPM_Enable_VCE_HS ((uint16_t) 0x111)
|
| /src/sys/external/bsd/drm2/dist/drm/nouveau/dispnv04/ |
| nouveau_dispnv04_overlay.c | 422 nvif_wr32(dev, NV_PVIDEO_CONTROL_X, 0x111); /* (WEIGHT_HEAVY, SHARPENING_ON, SMOOTHING_ON) */
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| SIDefines.h | 685 ROW_SHR_FIRST = 0x111,
|
| /src/external/gpl3/gdb/dist/gdb/testsuite/gdb.btrace/ |
| x86_64-tailcall-only.S | 124 .long 0x111 # Length of Compilation Unit Info
|
| /src/external/gpl3/gdb.old/dist/gdb/testsuite/gdb.btrace/ |
| x86_64-tailcall-only.S | 124 .long 0x111 # Length of Compilation Unit Info
|
| /src/sys/arch/powerpc/powerpc/ |
| db_disasm.c | 437 { 0x111, "sprg1" },
569 { 0x111, "dma0_ct2" },
|
