| /src/sys/arch/powerpc/include/ |
| spr.h | 142 #define SPR_SPRG6 0x116 /* E4.. SPR General 6 */
|
| /src/sys/arch/amiga/amiga/ |
| cc_registers.h | 165 #define R_BPL3DAT 0x116
|
| /src/sys/arch/hpcmips/dev/ |
| ite8181reg.h | 97 #define ITE8181_GUI_CC1R2 0x116
|
| /src/external/gpl3/binutils/dist/gprofng/src/ |
| hwc_arm64_amcc.h | 82 { I("page_walk_l2_stage2_hit", 0x116, STXT("Page walk, L2 stage-2 hit")) },
|
| hwc_arm_ampere_1.h | 127 { I("bpu_hit_btb_and_mispredict", 0x116,
|
| /src/external/gpl3/binutils.old/dist/gprofng/src/ |
| hwc_arm64_amcc.h | 82 { I("page_walk_l2_stage2_hit", 0x116, STXT("Page walk, L2 stage-2 hit")) },
|
| hwc_arm_ampere_1.h | 127 { I("bpu_hit_btb_and_mispredict", 0x116,
|
| /src/lib/libform/ |
| form.h | 111 #define REQ_PREV_WORD (KEY_MAX + 0x116) /* go to the previous word
|
| /src/sys/external/bsd/drm2/dist/include/drm/ |
| drm_dp_helper.h | 517 #define DP_RECEIVER_ALPM_CONFIG 0x116 /* eDP 1.4 */
|
| /src/sys/external/gpl2/dts/dist/include/dt-bindings/input/ |
| linux-event-codes.h | 364 #define BTN_BACK 0x116
|
| /src/crypto/external/apache2/openssl/dist/crypto/modes/asm/ |
| ghash-sparcv9.pl | 557 "xmulxhi" => 0x116 );
|
| /src/crypto/external/bsd/openssl/dist/crypto/modes/asm/ |
| ghash-sparcv9.pl | 557 "xmulxhi" => 0x116 );
|
| /src/crypto/external/bsd/openssl.old/dist/crypto/modes/asm/ |
| ghash-sparcv9.pl | 555 "xmulxhi" => 0x116 );
|
| /src/external/bsd/openldap/dist/libraries/libldap/ |
| t61.c | 226 0, 0x226, 0x1e02, 0x10a, 0x1e0a, 0x116, 0x1e1e, 0x120,
|
| /src/sys/arch/powerpc/powerpc/ |
| db_disasm.c | 442 { 0x116, "sprg6" },
|
| /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/bif/ |
| bif_5_0_d.h | 424 #define mmPCIE_VENDOR_SPECIFIC_HDR_GPUIOV_VF10_FB 0x116
|
| /src/external/bsd/tcpdump/dist/ |
| print-forces.c | 375 if (ttlv >= 0x110 && ttlv <= 0x116)
|
| /src/sys/dev/qbus/ |
| qfont.c | 97 ,0x00 ,0x00 ,0x112 ,0x113 ,0x114 ,0x115 ,0x116 ,0x117 /* 136 */
132 ,0x00 ,0x00 ,0x112 ,0x113 ,0x114 ,0x115 ,0x116 ,0x117 /* 136 */
|
| /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/ |
| gfx_8_0_enum.h | 406 CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_2TO1__3BLOCKS_2TO2= 0x116,
1606 SC_GRP2_DYN_SCLK_BUSY = 0x116,
2563 SQ_PERF_SEL_ATC_XNACK_FIFO_FULL = 0x116,
3568 #define SQ_DPP_ROW_SR6 0x116
|
| gfx_8_1_enum.h | 406 CB_PERF_SEL_CC_DCC_KEY_VALUE__1BLOCK_2TO1__3BLOCKS_2TO2= 0x116,
1624 SC_GRP2_DYN_SCLK_BUSY = 0x116,
2581 SQ_PERF_SEL_ATC_XNACK_FIFO_FULL = 0x116,
3586 #define SQ_DPP_ROW_SR6 0x116
|
| /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gmc/ |
| gmc_7_1_d.h | 1179 #define ixMC_IO_DEBUG_DQB3L_RXPHASE_D1 0x116
|
| gmc_8_1_d.h | 1283 #define ixMC_IO_DEBUG_DQB3L_RXPHASE_D1 0x116
|
| /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
| amdgpu_si_dpm.c | 253 { 0x116, 0x0001fffe, 1, 0x8, SISLANDS_CACCONFIG_CGIND },
254 { 0x116, 0x00000001, 0, 0x1, SISLANDS_CACCONFIG_CGIND },
540 { 0x116, 0x0001fffe, 1, 0x5, SISLANDS_CACCONFIG_CGIND },
541 { 0x116, 0x00000001, 0, 0x1, SISLANDS_CACCONFIG_CGIND },
|
| /src/sys/external/bsd/drm2/dist/drm/radeon/ |
| radeon_si_dpm.c | 160 { 0x116, 0x0001fffe, 1, 0x8, SISLANDS_CACCONFIG_CGIND },
161 { 0x116, 0x00000001, 0, 0x1, SISLANDS_CACCONFIG_CGIND },
445 { 0x116, 0x0001fffe, 1, 0x5, SISLANDS_CACCONFIG_CGIND },
446 { 0x116, 0x00000001, 0, 0x1, SISLANDS_CACCONFIG_CGIND },
|
| /src/external/gpl3/gdb.old/dist/gdb/testsuite/gdb.dwarf2/ |
| entry-value-typedef-aarch64.S | 357 .2byte 0x116
1219 .2byte 0x116
4599 .2byte 0x116
7499 .2byte 0x116
7968 .2byte 0x116
|
