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  /src/sys/dev/pcmcia/
if_cnwreg.h 76 #define CNW_EREG_RSERW 0x124
  /src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/broadcom/
bcm5301x.dtsi 102 <0x18029000 0x124>,
bcm-hr2.dtsi 223 <0x027000 0x124>,
  /src/sys/arch/arm/broadcom/
bcm2835_cm.h 152 #define CM_CKSM 0x124
  /src/sys/arch/arm/ixp12x0/
ixp12x0_pcireg.h 111 #define I2O_IPT 0x124
  /src/sys/arch/arm/nvidia/
tegra124_xusbpadreg.h 105 #define XUSB_PADCTL_IOPHY_MISC_PAD_P4_CTL5_REG 0x124
  /src/sys/dev/usb/
if_smscreg.h 148 #define SMSC_VLAN2 0x124
if_muereg.h 80 #define MUE_MII_DATA 0x124
  /src/sys/arch/amiga/amiga/
cc_registers.h 172 #define R_SPR1PTH 0x124
  /src/sys/arch/arm/footbridge/
dc21285reg.h 187 #define I2O_INBOUND_POST_TAIL 0x124
  /src/sys/arch/arm/imx/
imx23_icollreg.h 241 #define HW_ICOLL_INTERRUPT0_SET 0x124
imx23_digctlreg.h 244 #define HW_DIGCTL_OCRAM_STATUS1_SET 0x124
  /src/sys/arch/arm/ti/
if_cpswreg.h 48 #define CPSW_PORT_P_SA_HI(p) (CPSW_PORT_OFFSET + 0x124 + ((p-1) * 0x100))
omap2_gpmcreg.h 86 #define GPMC_CONFIG2_4 0x124
  /src/sys/dev/ic/
ahcisatareg.h 255 #define AHCI_P_SIG(p) (0x124 + AHCI_P_OFFSET(p)) /* device signature */
  /src/sys/dev/pci/
cs4281reg.h 95 #define CS4281_DCC1 0x124 /* DMA Engine 1 Current Count Register */
if_bwfm_pci.h 51 #define BWFM_PCI_PCIE2REG_CONFIGDATA 0x124
  /src/sys/dev/sbus/
p9100reg.h 135 #define VID_VSRE 0x124 /* vsync raising edge */
  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
ppsmc.h 190 #define PPSMC_MSG_UVD_DPM_Config ((uint32_t) 0x124)
  /src/sys/external/bsd/drm2/dist/drm/radeon/
ppsmc.h 186 #define PPSMC_MSG_UVD_DPM_Config ((uint32_t) 0x124)
  /src/external/bsd/ntp/dist/kernel/sys/
tt560_api.h 333 #define SYNC_GEN_OFF_REG 0x124
  /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/inc/
tonga_ppsmc.h 234 #define PPSMC_MSG_UVD_DPM_Config ((uint16_t) 0x124)
237 #define PPSMC_MSG_LCLK_DPM_Config ((uint16_t) 0x124)
  /src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/nxp/imx/
imxrt1050-pinfunc.h 555 #define MXRT1050_IOMUXC_GPIO_AD_B1_10_FLEXSPI_A_DATA3 0x124 0x314 0x4B4 0x0 0x1
556 #define MXRT1050_IOMUXC_GPIO_AD_B1_10_WDOG1_B 0x124 0x314 0x000 0x1 0x0
557 #define MXRT1050_IOMUXC_GPIO_AD_B1_10_LPUART8_TXD 0x124 0x314 0x564 0x2 0x1
558 #define MXRT1050_IOMUXC_GPIO_AD_B1_10_SAI1_RX_SYNC 0x124 0x314 0x5A4 0x3 0x1
559 #define MXRT1050_IOMUXC_GPIO_AD_B1_10_CSI_DATA07 0x124 0x314 0x414 0x4 0x0
560 #define MXRT1050_IOMUXC_GPIO_AD_B1_10_GPIO1_IO26 0x124 0x314 0x000 0x5 0x0
561 #define MXRT1050_IOMUXC_GPIO_AD_B1_10_USDHC2_WP 0x124 0x314 0x608 0x6 0x1
562 #define MXRT1050_IOMUXC_GPIO_AD_B1_10_KPP_ROW02 0x124 0x314 0x000 0x7 0x0
  /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/broadcom/stingray/
stingray-pinctrl.dtsi 191 0x124 MODE_NITRO /* uart2_sin */
  /src/lib/libform/
form.h 134 #define REQ_DEL_LINE (KEY_MAX + 0x124) /* delete the current line */

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