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  /src/sys/arch/mac68k/include/
psc.h 84 #define PSC_LEV3_ISR 0x130 /* level 3 interrupt status register */
  /src/sys/arch/ia64/include/
setjmp.h 72 #define J_F25 0x130
  /src/sys/dev/pcmcia/
if_cnwreg.h 77 #define CNW_EREG_TSER 0x130
  /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/broadcom/stingray/
stingray-pcie.dtsi 31 <0x130 &gic_its 0x22e8 0x8>, /* PF5-VF40-47 */
  /src/sys/external/gpl2/dts/dist/include/dt-bindings/clock/
am3.h 67 #define AM3_OCPWP_CLKCTRL AM3_L4_PER_CLKCTRL_INDEX(0x130)
139 #define AM3_L4LS_OCPWP_CLKCTRL AM3_L4LS_CLKCTRL_INDEX(0x130)
dra7.h 151 #define DRA7_TIMER16_CLKCTRL _DRA7_L4PER_CLKCTRL_INDEX(0x130)
372 #define DRA7_L4PER3_TIMER16_CLKCTRL DRA7_L4PER3_CLKCTRL_INDEX(0x130)
  /src/sys/arch/amiga/dev/
gvpio.c 91 { "com", 0x130, 115200 * 16 * 4, 6 },
  /src/sys/arch/arm/broadcom/
bcm2835_cm.h 155 #define CM_PLLTCTL 0x130
  /src/sys/arch/arm/ixp12x0/
ixp12x0_pcireg.h 114 #define I2O_IFC 0x130
  /src/sys/arch/arm/nvidia/
tegra124_xusbpadreg.h 108 #define XUSB_PADCTL_IOPHY_MISC_PAD_P4_CTL6_REG 0x130
  /src/sys/arch/arm/s3c2xx0/
s3c2410reg.h 70 #define S3C2410_USBDC_SIZE 0x130
  /src/sys/arch/sh3/include/
pcicreg.h 74 #define SH4_PCIAINT (SH4_PCIC+0x130) /* 32bit */
  /src/sys/dev/eisa/
bha_eisa.c 83 port = 0x130;
  /src/sys/dev/pci/
if_nfereg.h 64 #define NFE_SETUP_R5 0x130
  /src/sys/dev/tc/
ioasicreg.h 108 #define IOASIC_CURADDR IOASIC_SLOT_1_START+0x130
  /src/sys/dev/usb/
if_smscreg.h 151 #define SMSC_COE_CTRL 0x130
  /src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/
omap4-kc1.dts 69 OMAP4_IOPAD(0x130, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c4_sda */
  /src/sys/arch/hpcmips/tx/
tx39icureg.h 51 #define TX39_INTRSTATUS7_REG 0x130
70 #define TX39_INTRCLEAR7_REG 0x130
  /src/sys/arch/amiga/amiga/
cc_registers.h 178 #define R_SPR4PTH 0x130
  /src/sys/arch/arm/footbridge/
dc21285reg.h 190 #define I2O_INBOUND_FREE_COUNT 0x130
  /src/sys/arch/arm/imx/
imx23_clkctrlreg.h 303 #define HW_CLKCTRL_STATUS 0x130
imx23_powerreg.h 381 #define HW_POWER_VERSION 0x130
  /src/sys/arch/arm/ti/
omap2_gpmcreg.h 92 #define GPMC_CONFIG5_4 0x130
  /src/sys/dev/ic/
mvsatareg.h 58 #define SATAHC_I_LTMODE(p) ((p) * 0x100 + 0x130)
  /src/sys/dev/isa/
addcom_isa.c 102 0x130,

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