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  /src/sys/dev/usb/
if_urlreg.h 107 #define URL_PHYADD 0x138 /* MII PHY Address select */
  /src/sys/dev/pci/qat/
qat_c3xxxreg.h 124 #define TICPPINTCTL_C3XXX (0x3A400 + 0x138)
qat_c62xreg.h 127 #define TICPPINTCTL_C62X (0x3A400 + 0x138)
qat_d15xxreg.h 127 #define TICPPINTCTL_D15XX (0x3A400 + 0x138)
  /src/sys/arch/arm/broadcom/
bcm2835_cm.h 157 #define CM_PLLTCNT1 0x138
  /src/sys/arch/arm/ixp12x0/
ixp12x0_pcireg.h 116 #define I2O_IPC 0x138
  /src/sys/arch/arm/nvidia/
tegra124_xusbpadreg.h 110 #define XUSB_PADCTL_IOPHY_PLL_S0_CTL1_REG 0x138
tegra210_pinmux.c 139 TEGRA_PIN("dap2_din_paa2", 0x138, "i2s2", "rsvd1", "rsvd2", "rsvd3"),
tegra_hdmireg.h 142 #define HDMI_NV_PDISP_HDMI_EMU1_RDATA_REG 0x138
  /src/sys/external/gpl2/dts/dist/include/dt-bindings/clock/
omap4.h 122 #define OMAP4_SLIMBUS2_CLKCTRL OMAP4_CLKCTRL_INDEX(0x138)
dra7.h 184 #define DRA7_L4PER2_QSPI_CLKCTRL DRA7_L4PER2_CLKCTRL_INDEX(0x138)
  /src/sys/arch/hpcmips/tx/
tx39icureg.h 52 #define TX39_INTRSTATUS8_REG 0x138
71 #define TX39_INTRCLEAR8_REG 0x138
  /src/sys/arch/amiga/amiga/
cc_registers.h 182 #define R_SPR6PTH 0x138
  /src/sys/arch/arm/footbridge/
dc21285reg.h 192 #define I2O_INBOUND_POST_COUNT 0x138
  /src/sys/arch/arm/ti/
omap2_gpmcreg.h 91 #define GPMC_CONFIG7_4 0x138
  /src/sys/dev/ic/
ahcisatareg.h 274 #define AHCI_P_CI(p) (0x138 + AHCI_P_OFFSET(p)) /* Command issued */
  /src/sys/dev/pci/
cs4281reg.h 100 #define CS4281_DBA2 0x138 /* DMA Engine 2 Base Address Register */
  /src/sys/dev/sbus/
p9100reg.h 140 #define VID_SRTC 0x138 /* screen repaint timing control */
  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
ppsmc.h 129 #define PPSMC_MSG_ACPPowerON ((uint16_t) 0x138)
  /src/sys/external/bsd/drm2/dist/drm/radeon/
ppsmc.h 126 #define PPSMC_MSG_ACPPowerON ((uint16_t) 0x138)
  /src/external/bsd/ntp/dist/kernel/sys/
tt560_api.h 335 #define TIME_CMP_REG 0x138
  /src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/nxp/imx/
imxrt1050-pinfunc.h 600 #define MXRT1050_IOMUXC_GPIO_AD_B1_15_FLEXSPI_A_SS0_B 0x138 0x328 0x000 0x0 0x0
601 #define MXRT1050_IOMUXC_GPIO_AD_B1_15_ACMP4_OUT 0x138 0x328 0x000 0x1 0x0
602 #define MXRT1050_IOMUXC_GPIO_AD_B1_15_LPSPI3_SCK 0x138 0x328 0x510 0x2 0x1
603 #define MXRT1050_IOMUXC_GPIO_AD_B1_15_SAI1_TX_SYNC 0x138 0x328 0x5AC 0x3 0x1
604 #define MXRT1050_IOMUXC_GPIO_AD_B1_15_CSI_DATA02 0x138 0x328 0x400 0x4 0x0
605 #define MXRT1050_IOMUXC_GPIO_AD_B1_15_GPIO1_IO31 0x138 0x328 0x000 0x5 0x0
606 #define MXRT1050_IOMUXC_GPIO_AD_B1_15_USDHC2_DATA7 0x138 0x328 0x604 0x6 0x1
607 #define MXRT1050_IOMUXC_GPIO_AD_B1_15_KPP_COL00 0x138 0x328 0x000 0x7 0x0
  /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/broadcom/stingray/
stingray-pinctrl.dtsi 206 0x138 MODE_NITRO /* i2s_sdout */
  /src/lib/libform/
form.h 168 #define REQ_PREV_CHOICE (KEY_MAX + 0x138) /* display previous field choice */
  /src/sys/arch/arm/imx/
imx23_digctlreg.h 255 #define HW_DIGCTL_OCRAM_STATUS2_CLR 0x138

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