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Searched
refs:x140
(Results
1 - 25
of
166
) sorted by relevancy
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/src/sys/arch/arm/imx/
imx23_apbxdmareg.h
57
#define HW_APBX_CH0_SEMA 0
x140
/src/sys/arch/amiga/dev/
efareg.h
66
#define FATA1_PION_OFF_INTST 0
x140
/* FastATA interrupt status */
/src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/freescale/
imx8mm-icore-mx8mm-ctouch2.dts
57
MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX 0
x140
58
MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX 0
x140
imx8mm-icore-mx8mm-edimm2.2.dts
57
MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX 0
x140
58
MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX 0
x140
imx8mm-kontron-n801x-s.dts
291
MX8MM_IOMUXC_SAI2_RXC_UART1_DCE_RX 0
x140
292
MX8MM_IOMUXC_SAI2_RXFS_UART1_DCE_TX 0
x140
293
MX8MM_IOMUXC_SAI2_RXD0_UART1_DCE_RTS_B 0
x140
294
MX8MM_IOMUXC_SAI2_TXFS_UART1_DCE_CTS_B 0
x140
300
MX8MM_IOMUXC_SAI3_TXFS_UART2_DCE_RX 0
x140
301
MX8MM_IOMUXC_SAI3_TXC_UART2_DCE_TX 0
x140
302
MX8MM_IOMUXC_SAI3_RXD_UART2_DCE_RTS_B 0
x140
303
MX8MM_IOMUXC_SAI3_RXC_UART2_DCE_CTS_B 0
x140
imx8mm-venice-gw73xx.dtsi
290
MX8MM_IOMUXC_UART1_RXD_UART1_DCE_RX 0
x140
291
MX8MM_IOMUXC_UART1_TXD_UART1_DCE_TX 0
x140
297
MX8MM_IOMUXC_UART3_RXD_UART3_DCE_RX 0
x140
298
MX8MM_IOMUXC_UART3_TXD_UART3_DCE_TX 0
x140
299
MX8MM_IOMUXC_ECSPI1_MISO_GPIO5_IO8 0
x140
300
MX8MM_IOMUXC_ECSPI1_SS0_GPIO5_IO9 0
x140
306
MX8MM_IOMUXC_UART4_RXD_UART4_DCE_RX 0
x140
307
MX8MM_IOMUXC_UART4_TXD_UART4_DCE_TX 0
x140
imx8mm-venice-gw71xx.dtsi
176
MX8MM_IOMUXC_UART1_RXD_UART1_DCE_RX 0
x140
177
MX8MM_IOMUXC_UART1_TXD_UART1_DCE_TX 0
x140
183
MX8MM_IOMUXC_UART3_RXD_UART3_DCE_RX 0
x140
184
MX8MM_IOMUXC_UART3_TXD_UART3_DCE_TX 0
x140
imx8mm-venice-gw7901.dts
826
MX8MM_IOMUXC_SAI1_TXD5_GPIO4_IO17 0
x140
827
MX8MM_IOMUXC_GPIO1_IO15_USB2_OTG_OC 0
x140
836
MX8MM_IOMUXC_ECSPI1_SS0_GPIO5_IO9 0
x140
842
MX8MM_IOMUXC_UART1_RXD_UART1_DCE_RX 0
x140
843
MX8MM_IOMUXC_UART1_TXD_UART1_DCE_TX 0
x140
844
MX8MM_IOMUXC_GPIO1_IO01_GPIO1_IO1 0
x140
845
MX8MM_IOMUXC_GPIO1_IO10_GPIO1_IO10 0
x140
846
MX8MM_IOMUXC_GPIO1_IO11_GPIO1_IO11 0
x140
847
MX8MM_IOMUXC_GPIO1_IO12_GPIO1_IO12 0
x140
848
MX8MM_IOMUXC_GPIO1_IO14_GPIO1_IO14 0
x140
[
all
...]
imx8mm-venice-gw7902.dts
780
MX8MM_IOMUXC_SD1_DATA1_GPIO2_IO3 0
x140
/* CAN_IRQ# */
795
MX8MM_IOMUXC_UART1_RXD_UART1_DCE_RX 0
x140
796
MX8MM_IOMUXC_UART1_TXD_UART1_DCE_TX 0
x140
797
MX8MM_IOMUXC_SAI1_TXFS_GPIO4_IO10 0
x140
/* RTS */
798
MX8MM_IOMUXC_SAI2_TXFS_GPIO4_IO24 0
x140
/* CTS */
812
MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX 0
x140
813
MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX 0
x140
825
MX8MM_IOMUXC_UART3_RXD_UART3_DCE_RX 0
x140
826
MX8MM_IOMUXC_UART3_TXD_UART3_DCE_TX 0
x140
827
MX8MM_IOMUXC_SD1_CLK_GPIO2_IO0 0
x140
/* CTS *
[
all
...]
imx8mm-nitrogen-r2.dts
406
MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13 0
x140
538
MX8MM_IOMUXC_UART1_RXD_UART1_DCE_RX 0
x140
539
MX8MM_IOMUXC_UART1_TXD_UART1_DCE_TX 0
x140
540
MX8MM_IOMUXC_UART3_RXD_UART1_DCE_CTS_B 0
x140
541
MX8MM_IOMUXC_UART3_TXD_UART1_DCE_RTS_B 0
x140
547
MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX 0
x140
548
MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX 0
x140
554
MX8MM_IOMUXC_ECSPI1_SCLK_UART3_DCE_RX 0
x140
555
MX8MM_IOMUXC_ECSPI1_MOSI_UART3_DCE_TX 0
x140
556
MX8MM_IOMUXC_ECSPI1_SS0_UART3_DCE_RTS_B 0
x140
[
all
...]
imx8mm-venice-gw72xx.dtsi
241
MX8MM_IOMUXC_UART1_RXD_UART1_DCE_RX 0
x140
242
MX8MM_IOMUXC_UART1_TXD_UART1_DCE_TX 0
x140
248
MX8MM_IOMUXC_UART3_RXD_UART3_DCE_RX 0
x140
249
MX8MM_IOMUXC_UART3_TXD_UART3_DCE_TX 0
x140
255
MX8MM_IOMUXC_UART4_RXD_UART4_DCE_RX 0
x140
256
MX8MM_IOMUXC_UART4_TXD_UART4_DCE_TX 0
x140
imx8mm-var-som-symphony.dts
244
MX8MM_IOMUXC_UART1_RXD_UART1_DCE_RX 0
x140
245
MX8MM_IOMUXC_UART1_TXD_UART1_DCE_TX 0
x140
251
MX8MM_IOMUXC_UART3_RXD_UART3_DCE_RX 0
x140
252
MX8MM_IOMUXC_UART3_TXD_UART3_DCE_TX 0
x140
imx8mn-var-som-symphony.dts
229
MX8MN_IOMUXC_UART1_RXD_UART1_DCE_RX 0
x140
230
MX8MN_IOMUXC_UART1_TXD_UART1_DCE_TX 0
x140
236
MX8MN_IOMUXC_UART3_RXD_UART3_DCE_RX 0
x140
237
MX8MN_IOMUXC_UART3_TXD_UART3_DCE_TX 0
x140
imx8mn-venice-gw7902.dts
762
MX8MN_IOMUXC_SD1_DATA1_GPIO2_IO3 0
x140
/* CAN_IRQ# */
777
MX8MN_IOMUXC_UART1_RXD_UART1_DCE_RX 0
x140
778
MX8MN_IOMUXC_UART1_TXD_UART1_DCE_TX 0
x140
792
MX8MN_IOMUXC_UART2_RXD_UART2_DCE_RX 0
x140
793
MX8MN_IOMUXC_UART2_TXD_UART2_DCE_TX 0
x140
805
MX8MN_IOMUXC_UART3_RXD_UART3_DCE_RX 0
x140
806
MX8MN_IOMUXC_UART3_TXD_UART3_DCE_TX 0
x140
807
MX8MN_IOMUXC_SD1_CLK_GPIO2_IO0 0
x140
/* CTS */
808
MX8MN_IOMUXC_SD1_CMD_GPIO2_IO1 0
x140
/* RTS */
814
MX8MN_IOMUXC_UART4_RXD_UART4_DCE_RX 0
x140
[
all
...]
imx8mm-var-som.dtsi
416
MX8MM_IOMUXC_SAI3_TXFS_UART2_DCE_RX 0
x140
417
MX8MM_IOMUXC_SAI3_TXC_UART2_DCE_TX 0
x140
418
MX8MM_IOMUXC_SAI3_RXC_UART2_DCE_CTS_B 0
x140
419
MX8MM_IOMUXC_SAI3_RXD_UART2_DCE_RTS_B 0
x140
425
MX8MM_IOMUXC_UART4_RXD_UART4_DCE_RX 0
x140
426
MX8MM_IOMUXC_UART4_TXD_UART4_DCE_TX 0
x140
imx8mn-var-som.dtsi
406
MX8MN_IOMUXC_SAI3_TXFS_UART2_DCE_RX 0
x140
407
MX8MN_IOMUXC_SAI3_TXC_UART2_DCE_TX 0
x140
408
MX8MN_IOMUXC_SAI3_RXC_UART2_DCE_CTS_B 0
x140
409
MX8MN_IOMUXC_SAI3_RXD_UART2_DCE_RTS_B 0
x140
415
MX8MN_IOMUXC_UART4_RXD_UART4_DCE_RX 0
x140
416
MX8MN_IOMUXC_UART4_TXD_UART4_DCE_TX 0
x140
/src/sys/arch/evbarm/iyonix/
autoconf.c
161
#define IRQENABLE_ADDR 0
x140
165
bus_space_write_4(pa->pa_memt, vgah, 0
x140
, 0);
/src/sys/arch/iyonix/iyonix/
autoconf.c
161
#define IRQENABLE_ADDR 0
x140
165
bus_space_write_4(pa->pa_memt, vgah, 0
x140
, 0);
/src/sys/arch/arm/nvidia/
tegra_pciereg.h
44
0
x140
+ ((i) - 6) * 0x04)
/src/sys/arch/hpcmips/tx/
tx39timerreg.h
35
#define TX39_TIMERRTCHI_REG 0
x140
/src/sys/arch/mac68k/include/
psc.h
88
#define PSC_LEV4_ISR 0
x140
/* level 4 interrupt status register */
/src/sys/dev/usb/
if_urlreg.h
117
#define URL_BMCR 0
x140
/* Basic mode control register */
/src/sys/arch/ia64/include/
setjmp.h
73
#define J_F26 0
x140
/src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/
arm-realview-eb.dts
31
arm,hbi = <0
x140
>;
/src/sys/arch/alpha/pci/
lcareg.h
110
#define LCA_IOC_W_MASK0 (LCA_IOC_BASE + 0
x140
) /* Window Mask */
Completed in 57 milliseconds
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Indexes created Sun Oct 19 16:10:00 GMT 2025