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  /src/sys/arch/arm/imx/
imx23_apbxdmareg.h 57 #define HW_APBX_CH0_SEMA 0x140
  /src/sys/arch/amiga/dev/
efareg.h 66 #define FATA1_PION_OFF_INTST 0x140 /* FastATA interrupt status */
  /src/sys/arch/evbarm/iyonix/
autoconf.c 161 #define IRQENABLE_ADDR 0x140
165 bus_space_write_4(pa->pa_memt, vgah, 0x140, 0);
  /src/sys/arch/iyonix/iyonix/
autoconf.c 161 #define IRQENABLE_ADDR 0x140
165 bus_space_write_4(pa->pa_memt, vgah, 0x140, 0);
  /src/sys/arch/arm/nvidia/
tegra_pciereg.h 44 0x140 + ((i) - 6) * 0x04)
tegra124_xusbpadreg.h 112 #define XUSB_PADCTL_IOPHY_PLL_S0_CTL3_REG 0x140
  /src/sys/arch/hpcmips/tx/
tx39timerreg.h 35 #define TX39_TIMERRTCHI_REG 0x140
  /src/sys/arch/ia64/include/
setjmp.h 67 #define J_F26 0x140
  /src/sys/arch/mac68k/include/
psc.h 88 #define PSC_LEV4_ISR 0x140 /* level 4 interrupt status register */
  /src/sys/dev/usb/
if_urlreg.h 117 #define URL_BMCR 0x140 /* Basic mode control register */
  /src/sys/arch/alpha/pci/
lcareg.h 110 #define LCA_IOC_W_MASK0 (LCA_IOC_BASE + 0x140) /* Window Mask */
ciareg.h 160 #define CIA_CSR_CNFG (CIA_CSRS + 0x140)
  /src/sys/arch/arc/jazz/
rd94.h 64 #define RD94_SYS_DMA2_REGS (RD94SYS+0x140) /* DMA ch0 base address */
  /src/sys/arch/arm/clps711x/
clps711xreg.h 56 #define PS711X_SYSFLG 0x140 /* System Status Flag Register (RO) */
  /src/sys/arch/sh3/include/
exception.h 52 #define EXPEVT_RESET_TLB_MULTI_HIT 0x140 /* SH4 only */
pcicreg.h 76 #define SH4_PCIDMABT (SH4_PCIC+0x140) /* 32bit */
  /src/sys/dev/pcmcia/
if_cnwreg.h 86 #define CNW_EREG_TDP 0x140
  /src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/arm/
arm-realview-eb.dts 31 arm,hbi = <0x140>;
  /src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/broadcom/
bcm5301x.dtsi 89 reg = <0x140 0x24>;
  /src/sys/arch/arm/broadcom/
bcm2835_cm.h 159 #define CM_PLLTCNT3 0x140
  /src/sys/arch/arm/ixp12x0/
ixp12x0_pcireg.h 120 #define PCI_ADDR_EXT 0x140
  /src/sys/dev/isa/
adv_isa.c 85 0x140,
  /src/sys/dev/pci/
if_nfereg.h 66 #define NFE_SETUP_R7 0x140
  /src/sys/dev/tc/
ioasicreg.h 109 #define IOASIC_ISDN_X_DATA IOASIC_SLOT_1_START+0x140
  /src/sys/external/gpl2/dts/dist/include/dt-bindings/clock/
omap4.h 123 #define OMAP4_UART1_CLKCTRL OMAP4_CLKCTRL_INDEX(0x140)

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