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  /src/sys/arch/hpcmips/tx/
tx39timerreg.h 36 #define TX39_TIMERRTCLO_REG 0x144
  /src/sys/arch/mac68k/include/
psc.h 89 #define PSC_LEV4_IER 0x144 /* level 4 interrupt enable register */
  /src/sys/dev/usb/
if_urlreg.h 119 #define URL_ANAR 0x144 /* Auto-negotiation advertisement register */
  /src/sys/arch/arm/broadcom/
bcm2835_cm.h 160 #define CM_TDCLKEN 0x144
  /src/sys/arch/arm/ixp12x0/
ixp12x0_pcireg.h 123 #define PREFETCH_RANGE 0x144
  /src/sys/arch/arm/nvidia/
tegra124_xusbpadreg.h 113 #define XUSB_PADCTL_IOPHY_PLL_S0_CTL4_REG 0x144
tegra210_pinmux.c 142 TEGRA_PIN("dap4_fs_pj4", 0x144, "i2s4b", "rsvd1", "rsvd2", "rsvd3"),
tegra_hdmireg.h 150 #define HDMI_NV_PDISP_HDMI_SPDIF_CHN_STATUS2_REG 0x144
  /src/sys/dev/pci/
if_nfereg.h 67 #define NFE_RXTX_CTL 0x144
cs4281reg.h 103 #define CS4281_DCC3 0x144 /* DMA Engine 3 Current Count Register */
if_stgereg.h 448 #define STGE_EtherStatsPkts128to255Octets 0x144
  /src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/
omap4-kc1.dts 40 OMAP4_IOPAD(0x144, PIN_INPUT | MUX_MODE0) /* uart3_rx_irrx */
omap4-var-som-om44.dtsi 86 OMAP4_IOPAD(0x144, PIN_INPUT | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
vf610-pinfunc.h 523 #define VF610_PAD_PTD2__GPIO_81 0x144 0x000 ALT0 0x0
524 #define VF610_PAD_PTD2__QSPI0_A_DATA3 0x144 0x000 ALT1 0x0
525 #define VF610_PAD_PTD2__UART2_RTS 0x144 0x000 ALT2 0x0
526 #define VF610_PAD_PTD2__DSPI1_CS3 0x144 0x000 ALT3 0x0
527 #define VF610_PAD_PTD2__FB_AD13 0x144 0x000 ALT4 0x0
528 #define VF610_PAD_PTD2__SPDIF_OUT1 0x144 0x000 ALT5 0x0
529 #define VF610_PAD_PTD2__DEBUG_OUT19 0x144 0x000 ALT7 0x0
imx51-pinfunc.h 258 #define MX51_PAD_NANDF_CS5__FEC_TDATA2 0x144 0x52c 0x000 0x2 0x0
259 #define MX51_PAD_NANDF_CS5__GPIO3_21 0x144 0x52c 0x000 0x3 0x0
260 #define MX51_PAD_NANDF_CS5__NANDF_CS5 0x144 0x52c 0x000 0x0 0x0
261 #define MX51_PAD_NANDF_CS5__PATA_DA_1 0x144 0x52c 0x000 0x1 0x0
262 #define MX51_PAD_NANDF_CS5__SD4_DAT2 0x144 0x52c 0x000 0x5 0x0
263 #define MX51_PAD_NANDF_CS5__USBH3_DIR 0x144 0x52c 0xa1c 0x7 0x0
imx25-pinfunc.h 354 #define MX25_PAD_CSI_VSYNC__CSI_VSYNC 0x144 0x33c 0x000 0x00 0x000
355 #define MX25_PAD_CSI_VSYNC__AUD6_RXD 0x144 0x33c 0x000 0x01 0x000
356 #define MX25_PAD_CSI_VSYNC__ESDHC2_DAT1 0x144 0x33c 0x4e8 0x02 0x001
357 #define MX25_PAD_CSI_VSYNC__GPIO_1_9 0x144 0x33c 0x000 0x05 0x000
imx53-pinfunc.h 523 #define MX53_PAD_EIM_D26__EMI_WEIM_D_26 0x144 0x48c 0x000 0x0 0x0
524 #define MX53_PAD_EIM_D26__GPIO3_26 0x144 0x48c 0x000 0x1 0x0
525 #define MX53_PAD_EIM_D26__UART2_RXD_MUX 0x144 0x48c 0x880 0x2 0x0
526 #define MX53_PAD_EIM_D26__UART2_TXD_MUX 0x144 0x48c 0x000 0x2 0x0
527 #define MX53_PAD_EIM_D26__FIRI_RXD 0x144 0x48c 0x80c 0x3 0x0
528 #define MX53_PAD_EIM_D26__IPU_CSI0_D_1 0x144 0x48c 0x000 0x4 0x0
529 #define MX53_PAD_EIM_D26__IPU_DI1_PIN11 0x144 0x48c 0x000 0x5 0x0
530 #define MX53_PAD_EIM_D26__IPU_SISG_2 0x144 0x48c 0x000 0x6 0x0
531 #define MX53_PAD_EIM_D26__IPU_DISP1_DAT_22 0x144 0x48c 0x000 0x7 0x0
imx6dl-pinfunc.h 349 #define MX6QDL_PAD_EIM_D16__EIM_DATA16 0x144 0x514 0x000 0x0 0x0
350 #define MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x144 0x514 0x7d8 0x1 0x2
351 #define MX6QDL_PAD_EIM_D16__IPU1_DI0_PIN05 0x144 0x514 0x000 0x2 0x0
352 #define MX6QDL_PAD_EIM_D16__IPU1_CSI1_DATA18 0x144 0x514 0x8a8 0x3 0x1
353 #define MX6QDL_PAD_EIM_D16__HDMI_TX_DDC_SDA 0x144 0x514 0x864 0x4 0x0
354 #define MX6QDL_PAD_EIM_D16__GPIO3_IO16 0x144 0x514 0x000 0x5 0x0
355 #define MX6QDL_PAD_EIM_D16__I2C2_SDA 0x144 0x514 0x874 0x6 0x0
356 #define MX6QDL_PAD_EIM_D16__EPDC_DATA10 0x144 0x514 0x000 0x8 0x0
  /src/sys/arch/amiga/amiga/
cc_registers.h 188 #define R_SPR0_DATAA 0x144
  /src/sys/arch/arm/footbridge/
dc21285reg.h 224 #define PREFETCHABLE_MEM_RANGE 0x144
  /src/sys/arch/arm/s3c2xx0/
s3c2800reg.h 313 #define PCICTL_PCIBAM0 0x144 /* BAR0 mask */
  /src/sys/arch/arm/ti/
omap2_gpmcreg.h 97 #define GPMC_NAND_DATA_4 0x144
  /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/broadcom/stingray/
stingray-pinctrl.dtsi 209 0x144 MODE_NITRO /* i2s_mclk */
  /src/sys/arch/arm/imx/
imx23_digctlreg.h 264 #define HW_DIGCTL_OCRAM_STATUS3_SET 0x144
  /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/freescale/
imx8mp-pinfunc.h 438 #define MX8MP_IOMUXC_SAI5_MCLK__AUDIOMIX_SAI5_MCLK 0x144 0x3A4 0x4F0 0x0 0x0
439 #define MX8MP_IOMUXC_SAI5_MCLK__AUDIOMIX_SAI1_TX_BCLK 0x144 0x3A4 0x4D4 0x1 0x0
440 #define MX8MP_IOMUXC_SAI5_MCLK__PWM1_OUT 0x144 0x3A4 0x000 0x2 0x0
441 #define MX8MP_IOMUXC_SAI5_MCLK__I2C5_SDA 0x144 0x3A4 0x5C8 0x3 0x1
442 #define MX8MP_IOMUXC_SAI5_MCLK__GPIO3_IO25 0x144 0x3A4 0x000 0x5 0x0
443 #define MX8MP_IOMUXC_SAI5_MCLK__CAN2_RX 0x144 0x3A4 0x550 0x6 0x0

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