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  /src/sys/arch/hpcmips/tx/
tx39spireg.h 36 #define TX39_SPITXHOLD_REG 0x164 /* W */
37 #define TX39_SPIRXHOLD_REG 0x164 /* R */
  /src/sys/arch/mac68k/include/
psc.h 98 #define PSC_LEV6_IER 0x164 /* level 6 interrupt enable register */
  /src/sys/external/gpl2/dts/dist/include/dt-bindings/clock/
dm814.h 22 #define DM814_I2C1_CLKCTRL DM814_CLKCTRL_INDEX(0x164)
dm816.h 22 #define DM816_I2C1_CLKCTRL DM816_CLKCTRL_INDEX(0x164)
  /src/sys/arch/sparc64/include/
trap.h 124 #define T_SVID_SYSCALL 0x164
  /src/sys/arch/arm/broadcom/
bcm2835_cm.h 126 #define CM_DSI1PDIV 0x164
  /src/tests/lib/libcurses/tests/
std_defines 83 assign KEY_CLOSE 0x164
  /src/sys/arch/amiga/amiga/
cc_registers.h 204 #define R_SPR4_DATAA 0x164
  /src/sys/arch/arm/footbridge/
dc21285reg.h 263 #define UART_RX_STAT 0x164
  /src/sys/arch/arm/sunxi/
sunxi_mc_smp.c 58 #define PRCM_CPU_SOFT_ENTRY 0x164
  /src/sys/arch/arm/ti/
omap2_gpmcreg.h 100 #define GPMC_CONFIG6_5 0x164
  /src/sys/dev/pci/
cs4281reg.h 111 #define CS4281_DCR2 0x164 /* DMA Engine 2 Command Register */
  /src/external/bsd/ntp/dist/kernel/sys/
tt560_api.h 337 #define PRESET_POS_REG 0x164
  /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/broadcom/stingray/
stingray-pinctrl.dtsi 227 0x164 MODE_NITRO /* ext_mdio */
  /src/lib/libcurses/
keyname.c 263 if (key == 0x164) {
  /src/sys/arch/arm/imx/
imx23_digctlreg.h 284 #define HW_DIGCTL_OCRAM_STATUS5_SET 0x164
  /src/sys/arch/arm/nvidia/
tegra210_pinmux.c 150 TEGRA_PIN("clk_32k_out_py5", 0x164, "soc", "blink", "rsvd2", "rsvd3"),
tegra_hdmireg.h 212 #define HDMI_NV_PDISP_SOR_PLL2_REG 0x164
  /src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/nxp/imx/
imxrt1050-pinfunc.h 689 #define MXRT1050_IOMUXC_GPIO_B0_10_LCD_DATA06 0x164 0x354 0x000 0x0 0x0
690 #define MXRT1050_IOMUXC_GPIO_B0_10_TMR4_TIMER1 0x164 0x354 0x000 0x1 0x0
691 #define MXRT1050_IOMUXC_GPIO_B0_10_FLEXPWM2_PWM2_A 0x164 0x354 0x480 0x2 0x1
692 #define MXRT1050_IOMUXC_GPIO_B0_10_SAI1_TX_DATA03 0x164 0x354 0x598 0x3 0x1
693 #define MXRT1050_IOMUXC_GPIO_B0_10_FLEXIO2_D10 0x164 0x354 0x000 0x4 0x0
694 #define MXRT1050_IOMUXC_GPIO_B0_10_GPIO2_IO10 0x164 0x354 0x000 0x5 0x0
695 #define MXRT1050_IOMUXC_GPIO_B0_10_SRC_BT_CFG06 0x164 0x354 0x000 0x6 0x0
imx6dl-pinfunc.h 416 #define MX6QDL_PAD_EIM_D24__EIM_DATA24 0x164 0x534 0x000 0x0 0x0
417 #define MX6QDL_PAD_EIM_D24__ECSPI4_SS2 0x164 0x534 0x000 0x1 0x0
418 #define MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x164 0x534 0x000 0x2 0x0
419 #define MX6QDL_PAD_EIM_D24__UART3_RX_DATA 0x164 0x534 0x90c 0x2 0x0
420 #define MX6QDL_PAD_EIM_D24__ECSPI1_SS2 0x164 0x534 0x7ec 0x3 0x0
421 #define MX6QDL_PAD_EIM_D24__ECSPI2_SS2 0x164 0x534 0x000 0x4 0x0
422 #define MX6QDL_PAD_EIM_D24__GPIO3_IO24 0x164 0x534 0x000 0x5 0x0
423 #define MX6QDL_PAD_EIM_D24__AUD5_RXFS 0x164 0x534 0x7bc 0x6 0x1
424 #define MX6QDL_PAD_EIM_D24__UART1_DTR_B 0x164 0x534 0x000 0x7 0x0
425 #define MX6QDL_PAD_EIM_D24__EPDC_SDCE7 0x164 0x534 0x000 0x8 0x
    [all...]
imx25-pinfunc.h 387 #define MX25_PAD_CSPI1_SS1__CSPI1_SS1 0x164 0x35c 0x000 0x00 0x000
388 #define MX25_PAD_CSPI1_SS1__I2C3_DAT 0x164 0x35C 0x528 0x01 0x001
389 #define MX25_PAD_CSPI1_SS1__UART3_RTS 0x164 0x35c 0x000 0x02 0x000
390 #define MX25_PAD_CSPI1_SS1__GPIO_1_17 0x164 0x35c 0x000 0x05 0x000
  /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/freescale/
imx8mm-pinfunc.h 308 #define MX8MM_IOMUXC_SAI1_RXD0_SAI1_RX_DATA0 0x164 0x3CC 0x000 0x0 0x0
309 #define MX8MM_IOMUXC_SAI1_RXD0_SAI5_RX_DATA0 0x164 0x3CC 0x4D4 0x1 0x1
310 #define MX8MM_IOMUXC_SAI1_RXD0_PDM_DATA0 0x164 0x3CC 0x534 0x3 0x1
311 #define MX8MM_IOMUXC_SAI1_RXD0_CORESIGHT_TRACE0 0x164 0x3CC 0x000 0x4 0x0
312 #define MX8MM_IOMUXC_SAI1_RXD0_GPIO4_IO2 0x164 0x3CC 0x000 0x5 0x0
313 #define MX8MM_IOMUXC_SAI1_RXD0_CCMSRCGPCMIX_BOOT_CFG0 0x164 0x3CC 0x000 0x6 0x0
314 #define MX8MM_IOMUXC_SAI1_RXD0_SIM_M_HADDR17 0x164 0x3CC 0x000 0x7 0x0
imx8mp-pinfunc.h 473 #define MX8MP_IOMUXC_SAI1_RXD5__AUDIOMIX_SAI1_RX_DATA05 0x164 0x3C4 0x000 0x0 0x0
474 #define MX8MP_IOMUXC_SAI1_RXD5__AUDIOMIX_SAI6_TX_DATA00 0x164 0x3C4 0x000 0x1 0x0
475 #define MX8MP_IOMUXC_SAI1_RXD5__AUDIOMIX_SAI6_RX_DATA00 0x164 0x3C4 0x51C 0x2 0x1
476 #define MX8MP_IOMUXC_SAI1_RXD5__AUDIOMIX_SAI1_RX_SYNC 0x164 0x3C4 0x4D0 0x3 0x1
477 #define MX8MP_IOMUXC_SAI1_RXD5__ENET1_RGMII_RD1 0x164 0x3C4 0x584 0x4 0x1
478 #define MX8MP_IOMUXC_SAI1_RXD5__GPIO4_IO07 0x164 0x3C4 0x000 0x5 0x0
imx8mq-pinfunc.h 297 #define MX8MQ_IOMUXC_SAI1_RXD0_SAI1_RX_DATA0 0x164 0x3CC 0x000 0x0 0x0
298 #define MX8MQ_IOMUXC_SAI1_RXD0_SAI5_RX_DATA0 0x164 0x3CC 0x4D4 0x1 0x1
299 #define MX8MQ_IOMUXC_SAI1_RXD0_CORESIGHT_TRACE0 0x164 0x3CC 0x000 0x4 0x0
300 #define MX8MQ_IOMUXC_SAI1_RXD0_GPIO4_IO2 0x164 0x3CC 0x000 0x5 0x0
301 #define MX8MQ_IOMUXC_SAI1_RXD0_CCMSRCGPCMIX_BOOT_CFG0 0x164 0x3CC 0x000 0x6 0x0
302 #define MX8MQ_IOMUXC_SAI1_RXD0_SIM_M_HADDR17 0x164 0x3CC 0x000 0x7 0x0
  /src/sys/dev/marvell/
ehci_mv.c 92 #define MARVELL_USB_TXFILLTUNING 0x164

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