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Searched
refs:x244
(Results
1 - 25
of
39
) sorted by relevancy
1
2
/src/sys/arch/arm/samsung/
mct_reg.h
49
#define MCT_G_INT_CSTAT 0
x244
/* clear interrupt */
/src/sys/arch/x86/pci/
lpssreg.h
78
#define LPSS_REMAP_HI 0
x244
/src/sys/external/bsd/drm2/dist/drm/i915/gt/
intel_lrc.h
43
#define RING_CONTEXT_CONTROL(base) _MMIO((base) + 0
x244
)
intel_lrc.c
617
REG16(0
x244
),
652
REG16(0
x244
),
736
REG16(0
x244
),
768
REG16(0
x244
),
805
REG16(0
x244
),
889
REG16(0
x244
),
930
REG16(0
x244
),
/src/sys/arch/sparc64/dev/
ffbreg.h
167
#define FFB_FBC_BLENDC 0
x244
/src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/
keystone-k2hk.dtsi
101
reg = <0
x244
0x4>;
104
gpio,syscon-dev = <&devctrl 0
x244
>;
keystone-k2l.dtsi
303
reg = <0
x244
0x4>;
306
gpio,syscon-dev = <&devctrl 0
x244
>;
imx25-pinfunc.h
55
#define MX25_PAD_A20__A20 0x028 0
x244
0x000 0x00 0x000
56
#define MX25_PAD_A20__GPIO_2_6 0x028 0
x244
0x000 0x05 0x000
57
#define MX25_PAD_A20__SIM2_CLK1 0x028 0
x244
0x000 0x06 0x000
58
#define MX25_PAD_A20__FEC_RDATA2 0x028 0
x244
0x50c 0x07 0x000
imx6q-pinfunc.h
704
#define MX6QDL_PAD_GPIO_8__ESAI_TX5_RX0 0
x244
0x614 0x888 0x0 0x1
705
#define MX6QDL_PAD_GPIO_8__XTALOSC_REF_CLK_32K 0
x244
0x614 0x000 0x1 0x0
706
#define MX6QDL_PAD_GPIO_8__EPIT2_OUT 0
x244
0x614 0x000 0x2 0x0
707
#define MX6QDL_PAD_GPIO_8__FLEXCAN1_RX 0
x244
0x614 0x7e4 0x3 0x1
708
#define MX6QDL_PAD_GPIO_8__UART2_RX_DATA 0
x244
0x614 0x928 0x4 0x3
709
#define MX6QDL_PAD_GPIO_8__UART2_TX_DATA 0
x244
0x614 0x000 0x4 0x0
710
#define MX6QDL_PAD_GPIO_8__GPIO1_IO08 0
x244
0x614 0x000 0x5 0x0
711
#define MX6QDL_PAD_GPIO_8__SPDIF_SR_CLK 0
x244
0x614 0x000 0x6 0x0
712
#define MX6QDL_PAD_GPIO_8__USB_OTG_PWR_CTL_WAKE 0
x244
0x614 0x000 0x7 0x0
imx6dl-pinfunc.h
788
#define MX6QDL_PAD_KEY_COL0__ECSPI1_SCLK 0
x244
0x62c 0x7d8 0x0 0x3
789
#define MX6QDL_PAD_KEY_COL0__ENET_RX_DATA3 0
x244
0x62c 0x824 0x1 0x0
790
#define MX6QDL_PAD_KEY_COL0__AUD5_TXC 0
x244
0x62c 0x7c0 0x2 0x1
791
#define MX6QDL_PAD_KEY_COL0__KEY_COL0 0
x244
0x62c 0x000 0x3 0x0
792
#define MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0
x244
0x62c 0x000 0x4 0x0
793
#define MX6QDL_PAD_KEY_COL0__UART4_RX_DATA 0
x244
0x62c 0x914 0x4 0x2
794
#define MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0
x244
0x62c 0x000 0x5 0x0
795
#define MX6QDL_PAD_KEY_COL0__DCIC1_OUT 0
x244
0x62c 0x000 0x6 0x0
imx53-pinfunc.h
791
#define MX53_PAD_NANDF_CS3__EMI_NANDF_CS_3 0
x244
0x5bc 0x000 0x0 0x0
792
#define MX53_PAD_NANDF_CS3__GPIO6_16 0
x244
0x5bc 0x000 0x1 0x0
793
#define MX53_PAD_NANDF_CS3__IPU_SISG_1 0
x244
0x5bc 0x000 0x2 0x0
794
#define MX53_PAD_NANDF_CS3__ESAI1_TX1 0
x244
0x5bc 0x7e8 0x3 0x0
795
#define MX53_PAD_NANDF_CS3__EMI_WEIM_A_26 0
x244
0x5bc 0x000 0x4 0x0
796
#define MX53_PAD_NANDF_CS3__MLB_MLBDAT 0
x244
0x5bc 0x85c 0x6 0x0
797
#define MX53_PAD_NANDF_CS3__USBPHY1_VSTATUS_7 0
x244
0x5bc 0x000 0x7 0x0
imx6sl-pinfunc.h
909
#define MX6SL_PAD_SD1_DAT4__SD1_DATA4 0
x244
0x54c 0x000 0x0 0x0
910
#define MX6SL_PAD_SD1_DAT4__FEC_MDC 0
x244
0x54c 0x000 0x1 0x0
911
#define MX6SL_PAD_SD1_DAT4__KEY_COL3 0
x244
0x54c 0x740 0x2 0x2
912
#define MX6SL_PAD_SD1_DAT4__EPDC_SDCLK_N 0
x244
0x54c 0x000 0x3 0x0
913
#define MX6SL_PAD_SD1_DAT4__UART4_RX_DATA 0
x244
0x54c 0x814 0x4 0x4
914
#define MX6SL_PAD_SD1_DAT4__UART4_TX_DATA 0
x244
0x54c 0x000 0x4 0x0
915
#define MX6SL_PAD_SD1_DAT4__GPIO5_IO12 0
x244
0x54c 0x000 0x5 0x0
imx51-pinfunc.h
446
#define MX51_PAD_UART3_TXD__CSI1_D1 0
x244
0x634 0x000 0x2 0x0
447
#define MX51_PAD_UART3_TXD__GPIO1_23 0
x244
0x634 0x000 0x3 0x0
448
#define MX51_PAD_UART3_TXD__UART1_DSR 0
x244
0x634 0x000 0x0 0x0
449
#define MX51_PAD_UART3_TXD__UART3_TXD 0
x244
0x634 0x000 0x1 0x0
/src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/broadcom/stingray/
stingray-pinctrl.dtsi
335
0
x244
MODE_NITRO /* drdu3_vbus_present */
/src/sys/arch/arm/nvidia/
tegra210_pinmux.c
206
TEGRA_PIN("pa6", 0
x244
, "sata", "rsvd1", "rsvd2", "rsvd3"),
/src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/freescale/
imx8mn-pinfunc.h
621
#define MX8MN_IOMUXC_UART3_RXD_UART3_DCE_RX 0
x244
0x4AC 0x504 0x0 0x2
622
#define MX8MN_IOMUXC_UART3_RXD_UART3_DTE_TX 0
x244
0x4AC 0x000 0x0 0x0
623
#define MX8MN_IOMUXC_UART3_RXD_UART1_DCE_CTS_B 0
x244
0x4AC 0x000 0x1 0x0
624
#define MX8MN_IOMUXC_UART3_RXD_UART1_DTE_RTS_B 0
x244
0x4AC 0x4F0 0x1 0x0
625
#define MX8MN_IOMUXC_UART3_RXD_USDHC3_RESET_B 0
x244
0x4AC 0x000 0x2 0x0
626
#define MX8MN_IOMUXC_UART3_RXD_GPT1_CAPTURE2 0
x244
0x4AC 0x5EC 0x3 0x1
627
#define MX8MN_IOMUXC_UART3_RXD_GPIO5_IO26 0
x244
0x4AC 0x000 0x5 0x0
imx8mm-pinfunc.h
620
#define MX8MM_IOMUXC_UART3_RXD_UART3_DCE_RX 0
x244
0x4AC 0x504 0x0 0x2
621
#define MX8MM_IOMUXC_UART3_RXD_UART3_DTE_TX 0
x244
0x4AC 0x000 0x0 0x0
622
#define MX8MM_IOMUXC_UART3_RXD_UART1_DCE_CTS_B 0
x244
0x4AC 0x000 0x1 0x0
623
#define MX8MM_IOMUXC_UART3_RXD_UART1_DTE_RTS_B 0
x244
0x4AC 0x4F0 0x1 0x0
624
#define MX8MM_IOMUXC_UART3_RXD_GPIO5_IO26 0
x244
0x4AC 0x000 0x5 0x0
625
#define MX8MM_IOMUXC_UART3_RXD_TPSMP_HDATA28 0
x244
0x4AC 0x000 0x7 0x0
imx8mq-pinfunc.h
588
#define MX8MQ_IOMUXC_UART3_RXD_UART3_DCE_RX 0
x244
0x4AC 0x504 0x0 0x2
589
#define MX8MQ_IOMUXC_UART3_RXD_UART3_DTE_TX 0
x244
0x4AC 0x000 0x0 0x0
590
#define MX8MQ_IOMUXC_UART3_RXD_UART1_DCE_CTS_B 0
x244
0x4AC 0x000 0x1 0x0
591
#define MX8MQ_IOMUXC_UART3_RXD_UART1_DTE_RTS_B 0
x244
0x4AC 0x4F0 0x1 0x0
592
#define MX8MQ_IOMUXC_UART3_RXD_GPIO5_IO26 0
x244
0x4AC 0x000 0x5 0x0
593
#define MX8MQ_IOMUXC_UART3_RXD_TPSMP_HDATA28 0
x244
0x4AC 0x000 0x7 0x0
imx8mp-pinfunc.h
787
#define MX8MP_IOMUXC_HDMI_DDC_SDA__HDMIMIX_HDMI_SDA 0
x244
0x4A4 0x000 0x0 0x0
788
#define MX8MP_IOMUXC_HDMI_DDC_SDA__I2C5_SDA 0
x244
0x4A4 0x5C8 0x3 0x3
789
#define MX8MP_IOMUXC_HDMI_DDC_SDA__CAN1_RX 0
x244
0x4A4 0x54C 0x4 0x3
790
#define MX8MP_IOMUXC_HDMI_DDC_SDA__GPIO3_IO27 0
x244
0x4A4 0x000 0x5 0x0
/src/sys/dev/pci/
pdcsata.c
421
0
x244
+ (channel << 7), 4,
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/oss/
oss_2_0_d.h
168
#define ixCLIENT1_CK2 0
x244
/src/sys/external/bsd/drm2/dist/drm/amd/powerplay/inc/
fiji_ppsmc.h
354
#define PPSMC_MSG_UcodeAddressLow ((uint16_t) 0
x244
)
smu7_ppsmc.h
350
#define PPSMC_MSG_UcodeAddressLow ((uint16_t) 0
x244
)
tonga_ppsmc.h
383
#define PPSMC_MSG_UcodeAddressLow ((uint16_t) 0
x244
)
/src/sys/external/gpl2/dts/dist/include/dt-bindings/input/
linux-event-codes.h
611
#define KEY_APPSELECT 0
x244
/* AL Select Task/Application */
Completed in 131 milliseconds
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Indexes created Mon Oct 20 08:09:54 GMT 2025