/src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/ |
imx6ull-pinfunc.h | 29 #define MX6ULL_PAD_UART1_TX_DATA__UART5_DCE_TX 0x0084 0x0310 0x0000 0x9 0x0 30 #define MX6ULL_PAD_UART1_TX_DATA__UART5_DTE_RX 0x0084 0x0310 0x0644 0x9 0x4 31 #define MX6ULL_PAD_UART1_RX_DATA__UART5_DCE_RX 0x0088 0x0314 0x0644 0x9 0x5 32 #define MX6ULL_PAD_UART1_RX_DATA__UART5_DTE_TX 0x0088 0x0314 0x0000 0x9 0x0 33 #define MX6ULL_PAD_UART1_CTS_B__UART5_DCE_CTS 0x008C 0x0318 0x0000 0x9 0x0 34 #define MX6ULL_PAD_UART1_CTS_B__UART5_DTE_RTS 0x008C 0x0318 0x0640 0x9 0x3 35 #define MX6ULL_PAD_UART1_RTS_B__UART5_DCE_RTS 0x0090 0x031C 0x0640 0x9 0x4 36 #define MX6ULL_PAD_UART1_RTS_B__UART5_DTE_CTS 0x0090 0x031C 0x0000 0x9 0x0 37 #define MX6ULL_PAD_UART4_RX_DATA__EPDC_PWRCTRL01 0x00B8 0x0344 0x0000 0x9 0x0 38 #define MX6ULL_PAD_UART5_TX_DATA__EPDC_PWRCTRL02 0x00BC 0x0348 0x0000 0x9 0x [all...] |
imx7ulp-pinfunc.h | 22 #define IMX7ULP_PAD_PTC0__FB_AD0 0x0000 0x0000 0x9 0x0 28 #define IMX7ULP_PAD_PTC1__FB_AD1 0x0004 0x0000 0x9 0x0 34 #define IMX7ULP_PAD_PTC2__FB_AD2 0x0008 0x0000 0x9 0x0 39 #define IMX7ULP_PAD_PTC3__FB_AD3 0x000c 0x0000 0x9 0x0 47 #define IMX7ULP_PAD_PTC4__FB_AD4 0x0010 0x0000 0x9 0x0 55 #define IMX7ULP_PAD_PTC5__FB_AD5 0x0014 0x0000 0x9 0x0 63 #define IMX7ULP_PAD_PTC6__FB_AD6 0x0018 0x0000 0x9 0x0 69 #define IMX7ULP_PAD_PTC7__FB_AD7 0x001c 0x0000 0x9 0x0 77 #define IMX7ULP_PAD_PTC8__FB_AD8 0x0020 0x0000 0x9 0x0 85 #define IMX7ULP_PAD_PTC9__FB_AD9 0x0024 0x0000 0x9 0x [all...] |
at91-natte.dtsi | 69 reg = <0x9>; 85 reg = <0x9>; 101 reg = <0x9>; 117 reg = <0x9>; 133 reg = <0x9>; 149 reg = <0x9>; 165 reg = <0x9>; 181 reg = <0x9>;
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/src/lib/libc/arch/aarch64/sys/ |
getcontext.S | 42 mov x9, x0 /* Must save argument pointer. */ 45 str x30, [x9, #_UC_REGS_PC] /* Adjust PC. */ 52 str x0, [x9, #_UC_REGS_X0] /* Return 0. */
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pipe.S | 37 mov x9, x0 40 stp w0, w1, [x9]
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brk.S | 52 adrp x9, _C_LABEL(__minbrk) 53 ldr x10, [x9, #:lo12:_C_LABEL(__minbrk)] 66 adrp x9, _C_LABEL(__curbrk) 67 str x11, [x9, #:lo12:_C_LABEL(__curbrk)]
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sbrk.S | 52 adrp x9, _C_LABEL(__curbrk) 55 ldr x1, [x9, #:lo12:_C_LABEL(__curbrk)] 64 ldr x0, [x9, #:lo12:_C_LABEL(__curbrk)] 66 str x1, [x9, #:lo12:_C_LABEL(__curbrk)]
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/src/sys/arch/aarch64/aarch64/ |
start.S | 56 * x9 = (x8 + L2_SIZE - 1) & -L2_SIZE = new (aligned) loaded address 59 mov x9, #(L2_SIZE-1) 60 add x9, x9, x8 61 and x9, x9, #-L2_SIZE 62 cmp x8, x9 70 /* do memmove(x9, x8, x10) */ 72 add x13, x9, x10 76 cmp x13, x9 [all...] |
bus_space_asm_generic.S | 183 ldr x9, [x1, x8] 185 str x9, [x3], #8 251 ldr x9, [x1, x8] 253 rev x9, x9 254 str x9, [x3], #8 272 mov x9, #1 273 lsl x9, x9, x8 /* delta = 1 << tag->bs_stride */ 278 add x2, x2, x9 /* src += delta * [all...] |
fusu.S | 40 adrl x9, _C_LABEL(aarch64_pan_enabled) ; \ 41 ldr w9, [x9] ; \ 46 adrl x9, _C_LABEL(aarch64_pan_enabled) ; \ 47 ldr w9, [x9] ; \
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/src/common/lib/libc/arch/aarch64/string/ |
memcmp.S | 37 mov x9, x0 48 ands x3, x9, #7 57 sub x9, x9, x3 /* dword align src1 */ 62 ldr x4, [x9], #8 /* load dword from src1 */ 78 ldr x4, [x9], #8 96 ldr w4, [x9], #4 105 ldrh w5, [x9], #2 118 ldrb w5, [x9] 134 1: ldrb w4, [x9], # [all...] |
memset.S | 113 mrs x9, dczid_el0 117 tbnz x9, #4, .Lfilled 121 ubfx x9, x9, #0, #4 /* extract low 4 bits */ 122 add x9, x9, #2 /* add log2(word) */ 124 lsl x10, x10, x9 /* shift to get the block size */ 132 asr x12, x12, x9 /* "starting" block number */ 134 asr x13, x13, x9 /* "ending" block numebr */
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strlen.S | 49 add x9, x0, #8 /* start + dword */ 50 bic x9, x9, #7 /* and aligned */ 106 sub x0, x0, x9 /* subtract start from the length */
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/src/usr.sbin/rbootd/ |
rmp.h | 58 #define RMP_ADDR { 0x9, 0x0, 0x9, 0x0, 0x0, 0x4 }
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/src/sys/dev/i2c/ |
mpl115areg.h | 46 #define MPL115A_B2_LSB 0x9
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/src/sys/external/isc/libsodium/dist/src/libsodium/crypto_core/hsalsa20/ref2/ |
core_hsalsa20_ref2.c | 23 x9, x10, x11, x12, x13, x14, x15; local in function:crypto_core_hsalsa20 48 x9 = LOAD32_LE(in + 12); 55 x9 ^= ROTL32(x5 + x1, 7); 56 x13 ^= ROTL32(x9 + x5, 9); 57 x1 ^= ROTL32(x13 + x9, 13); 75 x11 ^= ROTL32(x10 + x9, 7); 77 x9 ^= ROTL32(x8 + x11, 13); 78 x10 ^= ROTL32(x9 + x8, 18); 92 STORE32_LE(out + 28, x9);
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/src/sys/external/gpl2/dts/dist/include/dt-bindings/net/ |
ti-dp83867.h | 31 #define DP83867_RGMIIDCTL_2_50_NS 0x9 49 #define DP83867_CLK_O_SEL_CHN_B_TCLK 0x9
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ti-dp83869.h | 31 #define DP83869_CLK_O_SEL_CHN_B_TCLK 0x9
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/src/sys/external/gpl2/dts/dist/include/dt-bindings/phy/ |
phy-qcom-qusb2.h | 21 #define QUSB2_V2_HSTX_TRIM_18_6_MA 0x9
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/src/sys/arch/amiga/dev/ |
acafhreg.h | 57 #define ACAFH_CHIPMAP 0x9
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/src/sys/arch/amiga/stand/bootblock/boot/ |
amigaio.h | 72 #define Cmd_Addtimereq 0x9
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/src/sys/arch/news68k/stand/boot/ |
locore.S | 29 .set IC_CLEAR,0x9
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/src/sys/dev/ic/ |
msm6242breg.h | 48 #define MSM6242B_10MONTH 0x9
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/src/sys/external/gpl2/dts/dist/include/dt-bindings/dma/ |
x1830-dma.h | 20 #define X1830_DMA_SADC_RX 0x9
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/src/sys/external/isc/libsodium/dist/src/libsodium/crypto_core/hchacha20/ |
core_hchacha20.c | 22 uint32_t x8, x9, x10, x11, x12, x13, x14, x15; local in function:crypto_core_hchacha20 40 x9 = LOAD32_LE(k + 20); 50 QUARTERROUND(x1, x5, x9, x13); 56 QUARTERROUND(x3, x4, x9, x14);
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