Searched refs:A1_SRC0 (Results 1 - 12 of 12) sorted by relevance

/xsrc/external/mit/xf86-video-intel/dist/xvmc/
H A Di915_program.h249 #define A1_SRC0(reg) (((reg) & UREG_MASK) << UREG_A1_SRC0_SHIFT_RIGHT) macro
H A Di915_xvmc.c60 *inst = (A1_SRC0(src0) | A1_SRC1(src1));
/xsrc/external/mit/xf86-video-intel-2014/dist/xvmc/
H A Di915_program.h249 #define A1_SRC0(reg) (((reg) & UREG_MASK) << UREG_A1_SRC0_SHIFT_RIGHT) macro
H A Di915_xvmc.c60 *inst = (A1_SRC0(src0) | A1_SRC1(src1));
/xsrc/external/mit/xf86-video-intel-old/dist/src/xvmc/
H A Di915_program.h250 #define A1_SRC0(reg) (((reg) & UREG_MASK) << UREG_A1_SRC0_SHIFT_RIGHT) macro
H A Di915_xvmc.c94 *inst = (A1_SRC0(src0) | A1_SRC1(src1));
/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/i915/
H A Di915_fpc.h158 #define A1_SRC0( reg ) (((reg)&UREG_MASK)<<UREG_A1_SRC0_SHIFT_RIGHT) macro
H A Di915_fpc_emit.c164 *(p->csr++) = (A1_SRC0(src0) | A1_SRC1(src1));
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/i915/
H A Di915_fpc.h147 #define A1_SRC0(reg) (((reg)&UREG_MASK) << UREG_A1_SRC0_SHIFT_RIGHT) macro
H A Di915_fpc_emit.c156 *(p->csr++) = (A1_SRC0(src0) | A1_SRC1(src1));
/xsrc/external/mit/MesaLib.old/dist/src/mesa/drivers/dri/i915/
H A Di915_program.c46 #define A1_SRC0( reg ) (((reg)&UREG_MASK)<<UREG_A1_SRC0_SHIFT_RIGHT) macro
196 *(p->csr++) = (A1_SRC0(src0) | A1_SRC1(src1));
/xsrc/external/mit/MesaLib/dist/src/mesa/drivers/dri/i915/
H A Di915_program.c46 #define A1_SRC0( reg ) (((reg)&UREG_MASK)<<UREG_A1_SRC0_SHIFT_RIGHT) macro
196 *(p->csr++) = (A1_SRC0(src0) | A1_SRC1(src1));

Completed in 16 milliseconds