Searched refs:BRW_WIDTH_8 (Results 1 - 25 of 25) sorted by relevance

/xsrc/external/mit/xf86-video-intel/dist/src/sna/brw/
H A Dbrw_wm.c85 dw == 16 ? BRW_WIDTH_16 : BRW_WIDTH_8,
162 dw == 16 ? BRW_WIDTH_16 : BRW_WIDTH_8,
H A Dbrw_eu.h315 #define BRW_WIDTH_8 3 macro
1289 BRW_WIDTH_8,
1483 imm.width = BRW_WIDTH_8;
H A Dbrw_eu_emit.c47 if (reg.width == BRW_WIDTH_8 && p->compressed)
/xsrc/external/mit/xf86-video-intel-2014/dist/src/sna/brw/
H A Dbrw_wm.c85 dw == 16 ? BRW_WIDTH_16 : BRW_WIDTH_8,
162 dw == 16 ? BRW_WIDTH_16 : BRW_WIDTH_8,
H A Dbrw_eu.h315 #define BRW_WIDTH_8 3 macro
1289 BRW_WIDTH_8,
1483 imm.width = BRW_WIDTH_8;
H A Dbrw_eu_emit.c47 if (reg.width == BRW_WIDTH_8 && p->compressed)
/xsrc/external/mit/xf86-video-intel/dist/src/sna/
H A Dgen8_eu.c360 if (reg.width == BRW_WIDTH_8 && p->compressed)
984 dw == 16 ? BRW_WIDTH_16 : BRW_WIDTH_8,
1039 dw == 16 ? BRW_WIDTH_16 : BRW_WIDTH_8,
/xsrc/external/mit/xf86-video-intel-2014/dist/src/sna/
H A Dgen8_eu.c360 if (reg.width == BRW_WIDTH_8 && p->compressed)
984 dw == 16 ? BRW_WIDTH_16 : BRW_WIDTH_8,
1039 dw == 16 ? BRW_WIDTH_16 : BRW_WIDTH_8,
/xsrc/external/mit/MesaLib.old/dist/src/intel/compiler/
H A Dbrw_eu_defines.h987 BRW_WIDTH_8 = 3, enumerator in enum:brw_width
H A Dbrw_fs_builder.h760 src.width != BRW_WIDTH_8 ||
H A Dbrw_reg.h477 BRW_WIDTH_8,
H A Dtest_eu_validate.cpp483 brw_inst_set_src1_width(&devinfo, last_inst, BRW_WIDTH_8);
496 brw_inst_set_src1_width(&devinfo, last_inst, BRW_WIDTH_8);
577 brw_inst_set_src1_width(&devinfo, last_inst, BRW_WIDTH_8);
H A Dbrw_disasm.c1045 case BRW_VERTICAL_STRIDE_8: return BRW_WIDTH_8;
H A Dbrw_eu_emit.c1129 src1.width = BRW_WIDTH_8;
/xsrc/external/mit/xf86-video-intel/dist/src/uxa/
H A Dbrw_defines.h687 #define BRW_WIDTH_8 3 macro
/xsrc/external/mit/xf86-video-intel/dist/xvmc/
H A Dbrw_defines.h687 #define BRW_WIDTH_8 3 macro
/xsrc/external/mit/xf86-video-intel-2014/dist/src/uxa/
H A Dbrw_defines.h687 #define BRW_WIDTH_8 3 macro
/xsrc/external/mit/xf86-video-intel-2014/dist/xvmc/
H A Dbrw_defines.h687 #define BRW_WIDTH_8 3 macro
/xsrc/external/mit/xf86-video-intel-old/dist/src/
H A Dbrw_defines.h680 #define BRW_WIDTH_8 3 macro
/xsrc/external/mit/MesaLib/dist/src/intel/compiler/
H A Dbrw_fs_builder.h824 src.width != BRW_WIDTH_8 ||
H A Dbrw_eu_defines.h1062 BRW_WIDTH_8 = 3, enumerator in enum:brw_width
H A Dbrw_reg.h470 BRW_WIDTH_8,
H A Dtest_eu_validate.cpp876 brw_inst_set_src1_width(&devinfo, last_inst, BRW_WIDTH_8);
889 brw_inst_set_src1_width(&devinfo, last_inst, BRW_WIDTH_8);
970 brw_inst_set_src1_width(&devinfo, last_inst, BRW_WIDTH_8);
H A Dbrw_disasm.c1218 case BRW_VERTICAL_STRIDE_8: return BRW_WIDTH_8;
H A Dbrw_eu_emit.c1243 src1.width = BRW_WIDTH_8;

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