Searched refs:CMD_3D_PRIM (Results 1 - 15 of 15) sorted by relevance

/xsrc/external/mit/MesaLib.old/dist/src/mesa/drivers/dri/i965/
H A Dbrw_draw.c261 OUT_BATCH(CMD_3D_PRIM << 16 | (7 - 2) | indirect_flag | predicate_enable);
264 OUT_BATCH(CMD_3D_PRIM << 16 | (6 - 2) |
H A Dbrw_misc_state.c578 OUT_BATCH(CMD_3D_PRIM << 16 | (7 - 2));
H A Dbrw_defines.h57 #define CMD_3D_PRIM 0x7b00 /* 3DPRIMITIVE */ macro
/xsrc/external/mit/xf86-video-intel/dist/src/uxa/
H A Dbrw_defines.h845 #define CMD_3D_PRIM 0x7b00 macro
/xsrc/external/mit/xf86-video-intel/dist/xvmc/
H A Dbrw_defines.h845 #define CMD_3D_PRIM 0x7b00 macro
/xsrc/external/mit/xf86-video-intel-2014/dist/src/uxa/
H A Dbrw_defines.h845 #define CMD_3D_PRIM 0x7b00 macro
/xsrc/external/mit/xf86-video-intel-2014/dist/xvmc/
H A Dbrw_defines.h845 #define CMD_3D_PRIM 0x7b00 macro
/xsrc/external/mit/xf86-video-intel-old/dist/src/
H A Dbrw_defines.h838 #define CMD_3D_PRIM 0x7b00 macro
/xsrc/external/mit/MesaLib/dist/src/mesa/drivers/dri/i965/
H A Dbrw_misc_state.c577 OUT_BATCH(CMD_3D_PRIM << 16 | (7 - 2));
H A Dbrw_draw.c265 OUT_BATCH(CMD_3D_PRIM << 16 | (7 - 2) | indirect_flag | predicate_enable);
268 OUT_BATCH(CMD_3D_PRIM << 16 | (6 - 2) |
H A Dbrw_defines.h57 #define CMD_3D_PRIM 0x7b00 /* 3DPRIMITIVE */ macro
/xsrc/external/mit/xf86-video-intel/dist/src/sna/
H A Dgen4_render.h1010 #define CMD_3D_PRIM 0x7b00 macro
H A Dgen5_render.h1098 #define CMD_3D_PRIM 0x7b00 macro
/xsrc/external/mit/xf86-video-intel-2014/dist/src/sna/
H A Dgen4_render.h1010 #define CMD_3D_PRIM 0x7b00 macro
H A Dgen5_render.h1098 #define CMD_3D_PRIM 0x7b00 macro

Completed in 62 milliseconds