Searched refs:DC_V_TIMING_2 (Results 1 - 6 of 6) sorted by relevance

/xsrc/external/mit/xf86-video-nsc/dist/src/gfx/
H A Ddisp_gu1.c732 WRITE_REG32(DC_V_TIMING_2, value);
979 timing2 = READ_REG32(DC_V_TIMING_2);
989 WRITE_REG32(DC_V_TIMING_2,
2527 return ((unsigned short)((READ_REG32(DC_V_TIMING_2) & 0x07FF) + 1));
2557 return ((unsigned short)(((READ_REG32(DC_V_TIMING_2) >> 16) & 0x07FF) +
H A Dgfx_regs.h248 #define DC_V_TIMING_2 0x8344 macro
H A Dtv_fs450.c3257 #define DC_V_TIMING_2 0X8344
3351 (DC_V_TIMING_2 == inRegAddr) ||
3510 WriteGx(DC_V_TIMING_2, reg);
/xsrc/external/mit/xf86-video-geode/dist/src/gfx/
H A Ddisp_gu1.c478 WRITE_REG32(DC_V_TIMING_2, value);
712 timing2 = READ_REG32(DC_V_TIMING_2);
720 WRITE_REG32(DC_V_TIMING_2,
2230 return ((unsigned short) ((READ_REG32(DC_V_TIMING_2) & 0x07FF) + 1));
2260 return ((unsigned short) (((READ_REG32(DC_V_TIMING_2) >> 16) & 0x07FF) +
H A Dgfx_regs.h147 #define DC_V_TIMING_2 0x8344 macro
H A Dtv_fs450.c3073 (DC_V_TIMING_2 == inRegAddr) ||
3232 WriteGx(DC_V_TIMING_2, reg);

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