Searched refs:DPLL_FPA01_P1_POST_DIV_MASK (Results 1 - 5 of 5) sorted by relevance

/xsrc/external/mit/xf86-video-intel-old/dist/src/
H A Di830_debug.c320 p1 = ffs((val & DPLL_FPA01_P1_POST_DIV_MASK) >>
1063 fpa0_p1 = ffs((val & DPLL_FPA01_P1_POST_DIV_MASK) >> 16);
H A Di810_reg.h971 # define DPLL_FPA01_P1_POST_DIV_MASK 0x00ff0000 /* i915 */ macro
H A Di830_display.c2222 clock.p1 = ffs((dpll & DPLL_FPA01_P1_POST_DIV_MASK) >>
/xsrc/external/mit/xf86-video-intel/dist/src/legacy/i810/
H A Di810_reg.h971 # define DPLL_FPA01_P1_POST_DIV_MASK 0x00ff0000 /* i915 */ macro
/xsrc/external/mit/xf86-video-intel-2014/dist/src/legacy/i810/
H A Di810_reg.h971 # define DPLL_FPA01_P1_POST_DIV_MASK 0x00ff0000 /* i915 */ macro

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