Searched refs:DRM_IOCTL_VC4_WAIT_SEQNO (Results 1 - 7 of 7) sorted by relevance

/xsrc/external/mit/libdrm/dist/include/drm/
H A Dvc4_drm.h50 #define DRM_IOCTL_VC4_WAIT_SEQNO DRM_IOWR(DRM_COMMAND_BASE + DRM_VC4_WAIT_SEQNO, struct drm_vc4_wait_seqno) macro
/xsrc/external/mit/MesaLib.old/dist/include/drm-uapi/
H A Dvc4_drm.h50 #define DRM_IOCTL_VC4_WAIT_SEQNO DRM_IOWR(DRM_COMMAND_BASE + DRM_VC4_WAIT_SEQNO, struct drm_vc4_wait_seqno) macro
/xsrc/external/mit/MesaLib/dist/include/drm-uapi/
H A Dvc4_drm.h50 #define DRM_IOCTL_VC4_WAIT_SEQNO DRM_IOWR(DRM_COMMAND_BASE + DRM_VC4_WAIT_SEQNO, struct drm_vc4_wait_seqno) macro
/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/vc4/
H A Dvc4_bufmgr.c546 int ret = vc4_ioctl(fd, DRM_IOCTL_VC4_WAIT_SEQNO, &wait);
H A Dvc4_simulator.c593 case DRM_IOCTL_VC4_WAIT_SEQNO:
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/vc4/
H A Dvc4_bufmgr.c538 int ret = vc4_ioctl(fd, DRM_IOCTL_VC4_WAIT_SEQNO, &wait);
H A Dvc4_simulator.c593 case DRM_IOCTL_VC4_WAIT_SEQNO:

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