Searched refs:GEN6_TD_CTL2_GS_EXECUTION_MASK_ENABLE (Results 1 - 2 of 2) sorted by relevance

/xsrc/external/mit/xf86-video-intel/dist/src/sna/
H A Dgen6_render.h270 #define GEN6_TD_CTL2_GS_EXECUTION_MASK_ENABLE (1 << 3) macro
577 #define GEN6_TD_CTL2_GS_EXECUTION_MASK_ENABLE (1 << 3) macro
/xsrc/external/mit/xf86-video-intel-2014/dist/src/sna/
H A Dgen6_render.h270 #define GEN6_TD_CTL2_GS_EXECUTION_MASK_ENABLE (1 << 3) macro
577 #define GEN6_TD_CTL2_GS_EXECUTION_MASK_ENABLE (1 << 3) macro

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